The Nintendo Wii is one of the most successful gaming platforms with the most diverse set of games — from fun games that can be enjoyed by the whole family to fitness programs that can be used by adults. They beat the dominant Sony Playstation and the Microsoft Xbox by thinking outside the box and creating a platform that was really… Read More
I read about how Toumaz used the Analog Fast SPICE (AFS) tool from BDA and it sounded interesting so I setup a Skype call with Alan Wong in the UK last month to find out how they design their ultra low-power IC chips.
Interview
Q: Tell me about your IC design background.
A: I’ve been at Toumaz almost 8 years now and before that at Sony… Read More
Hardware designers use complex EDA tool flows that have collections of underlying binary and text files. Keeping track of the versions of your IC design can be a real issue when your projects use teams of engineers. ClioSoft has been offering HCM (Hardware Configuration Management) tools that work in the most popular flows of: … Read More
If you are doing transistor-level IC design then you’ve probably come up against questions like:
In the old days we would hold up the old and new versions of the schematics or IC layout and try to eye-ball what had changed. Now we have an automated… Read More
Last Monday I sat down with Grego Sanguinetti in Beaverton, Oregon at the campus of Tektronix to hear about how they design their ICs using EDA tools from multiple vendors.… Read More
Richard Goering is well-known from his editorial days at EE Times (going back some 25 years), now at Cadence he blogs at least once a week on EDA topics that touch Cadence tools.
Before DAC he talked with Srinath Anantharaman about how Cadence tools work together with ClioSoft tools to keep IC Design Data Management Simple.
Through… Read More
Intro
Show me what has changed in my RTL or Schematic since the last time I looked. This task is now automated by Cliosoft with their new hierarchical tool called Visual Design Difference (VDD). Srinath showed me what was new for DAC.
Srinath Anantharaman
Notes
LSI, STMicro – use DesignSync for their DM but use VDD for seeing visual… Read More
Introduction
Cadence and ClioSoft made a webinar recently and I’ll summarize what I learned from it.
What’s New from Cadence in Virtuoso 6.1.5
Introduction
Here in the Silicon Forest (Oregon) we have a venture-backed, fabless analog semi company called Avnera that has designed over 10 Analog System on Chips (ASoC). Their chips are used in consumer products for both wireless audio and video applications.
James Rollins is the director of physical design at Avnera… Read More
