TSMC has been an ardent supporter of DAC for the last 18 years which has brought in the other foundries because, as the industry leader, wherever TSMC goes the other foundries naturally follow. The exception of course is Intel Custom Foundry because they march to the beat of a different drummer, if you know what I mean. The CoFluent… Read More
Tag: abhishek ranjan
How to Reduce Maximum Power at RTL Stage?
Of course that reduction has to stay throughout the design cycle up to layout implementation and fabrication. Since the advent of high density, mega functionality SoC designs at advanced nodes and battery life critical devices played by our fingertips, the gap between SoC power requirement and actual SoC power has only increased.… Read More