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Semiconductors, Apple Pie, and the 4th of July!

Semiconductors, Apple Pie, and the 4th of July!
by Daniel Nenni on 07-04-2023 at 6:00 am

Happy 4th of July 1024x768

Semiconductors, apple pie, and the 4th of July are American traditions. You can read about the history of semiconductors in our book “Fabless: The Transformation of the Semiconductor Industry” and the history of Arm in our book “Mobile Unleashed: The Origin and Evolution of Arm processors in our Devices“.… Read More


Computational Imaging Craves System-Level Design and Simulation Tools to Leverage AI in Embedded Vision

Computational Imaging Craves System-Level Design and Simulation Tools to Leverage AI in Embedded Vision
by Kalar Rajendiran on 07-03-2023 at 10:00 am

Typical Pipelines

Aberration-free optics are bulky and expensive. Thanks to high-performance AI-enabled processors and GPUs with abundant processing capabilities, image quality nowadays relies more on high computing power tied to miniaturized optics and sensors. Computational imaging is the new trend in imaging and relies on the fusion … Read More


A preview of Weebit Nano at DAC – with commentary from ChatGPT

A preview of Weebit Nano at DAC – with commentary from ChatGPT
by Daniel Nenni on 07-03-2023 at 6:00 am

Weebit Amir Regev Demo Screenshot

Weebit Nano, a provider of advanced non-volatile memory (NVM) IP, will be exhibiting at the Design Automation Conference (DAC) this month. As part of this briefing I shared some of the basic the details with ChatGPT to see how it would phrase things. Here is some of what it suggested: “You won’t want to miss out on the epic experience… Read More


Podcast EP169: How Are the Standards for the Terabit Era Defined?

Podcast EP169: How Are the Standards for the Terabit Era Defined?
by Daniel Nenni on 06-30-2023 at 10:00 am

Dan is joined by Priyank Shukla of Synopsys and Kent Lusted of Intel.

Priyank Shukla is a Sr. Staff Product Manager for the Synopsys High-Speed SerDes IP portfolio. He has broad experience in analog, mixed-signal design with strong focus on high performance compute, mobile and automotive SoCs.

Kent Lusted is a Principal Engineer… Read More


TSMC Redefines Foundry to Enable Next-Generation Products

TSMC Redefines Foundry to Enable Next-Generation Products
by Mike Gianfagna on 06-30-2023 at 6:00 am

TSMC Redefines Foundry to Enable Next Generation Products

For many years, monolithic chips defined semiconductor innovation. New microprocessors defined new markets, as did new graphics processors, and cell-phone chips. Getting to the next node was the goal, and when the foundry shipped a working part victory was declared. As we know, this is changing. Semiconductor innovation is… Read More


Is Your RTL and Netlist Ready for DFT?

Is Your RTL and Netlist Ready for DFT?
by Daniel Payne on 06-29-2023 at 10:00 am

Synopsys Test Family ready for DFT

I recall an early custom IC designed at Wang Labs in the 1980s without any DFT logic like scan chains, then I was confronted by Prabhu Goel about the merits of DFT, and so my journey on DFT began in earnest. I learned about ATPG at Silicon Compilers and Viewlogic, then observability at CrossCheck where I met Jennifer Scher, now she’s… Read More


Unique IO & ESD Solutions @ DAC 2023!

Unique IO & ESD Solutions @ DAC 2023!
by Daniel Nenni on 06-29-2023 at 6:00 am

DAC photo Certus Semiconductor

The semiconductor industry continues to drive innovation and constantly seeks methods to lower costs and improve performance. The advantages of custom I/O libraries versus free libraries can be seen as cost-savings or, more importantly, new markets, new customers, and new business
opportunities.

At DAC 2023, Certus SemiconductorRead More


Semiconductor CapEx down in 2023

Semiconductor CapEx down in 2023
by Bill Jewell on 06-28-2023 at 2:00 pm

Semiconductor Capex 2021 2022 2023

Semiconductor capital expenditures (CapEx) increased 35% in 2021 and 15% in 2022, according to IC Insights. Our projection at Semiconductor Intelligence is a 14% decline in CapEx in 2023, based primarily on company statements. The biggest cuts will be made by the memory companies, with a 19% drop. CapEx will drop 50% at SK Hynix… Read More


Better Randomizing Constrained Random. Innovation in Verification

Better Randomizing Constrained Random. Innovation in Verification
by Bernard Murphy on 06-28-2023 at 10:00 am

Innovation New

Constrained random methods in simulation are universally popular, still can the method be improved? Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome.… Read More


Clock Verification for Mobile SoCs

Clock Verification for Mobile SoCs
by Daniel Payne on 06-28-2023 at 6:00 am

Clock duty cycle distortion

The relentless advancement of mobile phone technology continues to push boundaries, demanding SoCs that deliver ever-increasing performance while preserving extensive battery life. To meet these demands, the industry is progressively embracing lower technology nodes with current designs being taped-out at 5nm or below.… Read More