Webinar: RF design success hinges on enhanced models and accurate simulationTraditional RF board design strategies based on circuit…Read More
Arteris Raises Bar Again with AI-Based NoC DesignModern semiconductor devices, a far cry from the…Read More
2025 Outlook with Veerbhan Kheterpal of QuadricQuadric Inc. is the leading licensor of general-purpose…Read More
Samtec Advances Multi-Channel SerDes Technology with Broadcom at DesignConThere were many announcements and significant demonstrations of…Read More
Aberration-free optics are bulky and expensive. Thanks to high-performance AI-enabled processors and GPUs with abundant processing capabilities, image quality nowadays relies more on high computing power tied to miniaturized optics and sensors. Computational imaging is the new trend in imaging and relies on the fusion … Read More
Weebit Nano, a provider of advanced non-volatile memory (NVM) IP, will be exhibiting at the Design Automation Conference (DAC) this month. As part of this briefing I shared some of the basic the details with ChatGPT to see how it would phrase things. Here is some of what it suggested: “You won’t want to miss out on the epic experience… Read More
Dan is joined by Priyank Shukla of Synopsys and Kent Lusted of Intel.
Priyank Shukla is a Sr. Staff Product Manager for the Synopsys High-Speed SerDes IP portfolio. He has broad experience in analog, mixed-signal design with strong focus on high performance compute, mobile and automotive SoCs.
Kent Lusted is a Principal Engineer… Read More
For many years, monolithic chips defined semiconductor innovation. New microprocessors defined new markets, as did new graphics processors, and cell-phone chips. Getting to the next node was the goal, and when the foundry shipped a working part victory was declared. As we know, this is changing. Semiconductor innovation is… Read More
I recall an early custom IC designed at Wang Labs in the 1980s without any DFT logic like scan chains, then I was confronted by Prabhu Goel about the merits of DFT, and so my journey on DFT began in earnest. I learned about ATPG at Silicon Compilers and Viewlogic, then observability at CrossCheck where I met Jennifer Scher, now she’s… Read More
The semiconductor industry continues to drive innovation and constantly seeks methods to lower costs and improve performance. The advantages of custom I/O libraries versus free libraries can be seen as cost-savings or, more importantly, new markets, new customers, and new business
opportunities.
At DAC 2023, Certus Semiconductor… Read More
Semiconductor capital expenditures (CapEx) increased 35% in 2021 and 15% in 2022, according to IC Insights. Our projection at Semiconductor Intelligence is a 14% decline in CapEx in 2023, based primarily on company statements. The biggest cuts will be made by the memory companies, with a 19% drop. CapEx will drop 50% at SK Hynix… Read More
Constrained random methods in simulation are universally popular, still can the method be improved? Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome.… Read More
The relentless advancement of mobile phone technology continues to push boundaries, demanding SoCs that deliver ever-increasing performance while preserving extensive battery life. To meet these demands, the industry is progressively embracing lower technology nodes with current designs being taped-out at 5nm or below.… Read More
On the heels of the TSMC Symposium and the Intel Foundry update, Samsung held their Foundry Forum today live in Silicon Valley. As usual it was a well attended event with hundreds of people and dozens of ecosystem partners. The theme was the AI Era which is appropriate. As I have mentioned before, AI will touch most every chip and there… Read More
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Rethinking Multipatterning for 2nm Node