Staff Design Engineer

Purpose of role

A key technical contributor on ASIC and IP/SoC development projects, working very closely with the ASIC engineering management to define and implement digital IP/SoC designs and integrate these and 3rd party designs into customer ASICs and SoCs.

The role involves working with customer requirements and providing technical advice and solutions in collaboration with multi-site development teams in producing high-quality designs.

Responsibilities

• Responsible for specifying, micro-architecting, implementing, and performing design verification of complex RTL IP blocks
• IP blocks can range from basic SoC building blocks, all the way through to complex video processing, data manipulation and encoding/decoding logic
• Involvement in the complete IP development cycle, from the customer’s initial concepts, through to providing support for back-end layout and silicon validation
• Work closely with the SoC architect to ensure designs meet the project requirements and interface correctly with the rest of the SoC
• Communicate with, influence and support design, verification, physical design, silicon validation, production test and product engineering
• Drive the analysis of customer requirements and implementation of functional digital designs and integration flows for complex SoCs.
• Development, maintenance and deployment of proprietary scripts and tools used in the design and database management of ASICs/SoCs.
• Deployment of industry-leading EDA tools for design quality assurance, power optimisation, constraints generation and synthesis/timing analysis.
• Keep up to date with relevant engineering advances in the field and ensure that Sondrel is kept at the forefront of the state-of-the-art technologies, methodologies and design processes as used in the industry
• Will be engaged in maintaining a high quality in their work.
• Should be able to coach junior designers and support them in all the domains of a design activities including but not limited to coding, rules and clock-crossing domain checking, debug, synthesis, DFT, links to backend (floor planning)
• Should be able to contribute to technical white papers.
• Will be required to provide sales support as part of a team

Key relationships

Internal

• Reports to: Engineering Manager/ Principal Engineer
• Working alongside: Engineers, Senior Engineers, Principal Engineers and
• Project Managers, Sales, Finance & HR
• Supervises: Design Team

External

• Customers – technical engineer to engineer (minimal)
• Suppliers- EDA Tool Vendor, Foundry/Assembly House Technical Contact

Employee Specification

Qualifications

Essential

• A degree/masters or PhD in a relevant subject

Desirable

• Masters or PhD in a related subject but with 5 years practicable experience.

Skills & Experience

Essential

• Typically, 5+ years’ experience.
• Input skill set one or more of the following:
• IP design, implementation, and verification
• RTL synthesis
• Performance analysis
• Power analysis
• Excellent knowledge of digital design concepts
• Demonstrates capability as a problem solver with an ability to work individually or as part of a team
• Evaluates issues and defines solutions as part of a team or takes the lead in solving the issue
• Contributes to technical projects with limited guidance
• Provide technical guidance and communication channels to junior engineers
• Solves problems of moderate-advanced complexity
• Broadens cross disciplinary knowledge through new assignments

Desirable

• HDL coding – VHDL, Verilog, System Verilog
• System design knowledge – clock domain management, reset schemes and power management
• Design for Test
• Knowledge of ARM processor subsystem
• Video processing
• Knowledge of bus protocols – AXI/AHB/ACE
• Low power design methodology, power intent definition and implementation – UPF/CPF
• Synthesis, constraints generation, STA, timing report review, design optimization, ECO fixes
• SoC level verification – HW/SW co-verification, multi-mode simulation, Gate-level simulation
• Design checking – Lint, CDC, LEC
• Security architecture
• IPXACT experience
• Tcl, Perl and or Python, SystemC,
• Database Management
• Validation and Product Engineering
• Database Linux software frameworks

Attributes

Essential

• Self-organisation and ability to respond to changing priorities quickly
• Ability to work under pressure
• Organisation and problem-solving skills
• Self-motivated
• Excellent attention to detail
• Well-organized and efficient
• Good communication skills and time management skills
• Fast learner, responding flexibly and positively to changing situations