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Layout Design Engineering Manager

Layout Design Engineering Manager
by Admin on 01-08-2026 at 3:40 pm

Website Intel

Job Description:

Lead Vehicle Development group within DTP develops lead Test Chips for next generation process development. We are looking for a candidate who can lead and develop a custom layout team. This position will lead a team responsible for the design of Analog, Mixed-Signal, and Memory layouts from base layers to full chip bumps.

As a manager, this person is expected to set priorities for the team, own the project milestones, collaborate across sites, ensure an inclusive work environment, develop employees, and manage performance. This position is also expected to work with stakeholders and partners to address project challenges and roadblocks.

The ideal candidate should exhibit the following behavioral traits:

  • Advanced English communications skills.
  • Strong leadership skills.

Qualifications:

Minimum qualifications are required to be initially considered for this position.

  • Bachelor’s degree in electrical engineering, computer engineering, or related field.
  • 6+ years of total experience in Analog or Mixed Signal or Memory layout design.
  • 3+ years of experience in Leadership roles.
  • Advanced English level.

Must have unrestricted – permanent right to work in Mexico.

The position is in Mexico; it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

  • Master’s degree in Electrical engineering, Computer engineering, or related field.
  • EDA Tools specifically Virtuoso EXL.
  • People and Technical Management experience.
  • Multiple Tape-out experience including 2+ tape-outs in advanced technologies.
  • Knowledge of VLSI design.
Apply for job

To view the job application please visit intel.wd1.myworkdayjobs.com.

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