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Formal verification engineer student

Formal verification engineer student
by Admin on 11-03-2025 at 2:18 pm

Your mission

  • 10h/week, from July 2025, hybrid
  • Be trained in state-of-the-art formal verification techniques
  • Be part of our verification team and help us verifying customers designs
  • Work on your own, with a team or lead your own project

Your profile

  • Ability to work independently and in a team
  • Basic knowledge in SystemVerilog/VHDL
  • Business level English
  • Beneficial: basic knowledge in SVA

Why us?

  • Flexible working hours that allow you to be the boss of your own work
  • Contribute your own ideas and manage your own development
  • Remote and on-site work
  • Regular team events in a young, dynamic, intercultural team
  • Hands-on insight into the working world and the growth of a startup

Apply for this job

About us

LUBIS is a fast-growing German startup redefining how the semiconductor industry works. We tackle one of its hardest challenges — ensuring complex chips work flawlessly before they’re built.

Our mission is simple: to transform verification from a craft into a system. By structuring how teams work and automation we make chip design faster, reliable, and bug-free.

LUBIS isn’t just improving the process — we’re defining how verification is done.

Apply for job

To view the job application please visit lubis-eda.jobs.personio.de.

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