Advanced Packaging Technology and Service-Testing Engineer
Website TSMC
Job Responsibilities
Testing R&D Engineer conduct exploratory research in DFT test architecture, evaluate next-gen test technology of several device (logic SOC, HPC, AP, RF, etc.), which used 3D silicon stacking and advanced packaging technologies and closely teamwork with international customer from new product introduction to mass production.
1. Testing Program R&D
(1) Develop new tests and test algorithms, including CP/FT/SLT and Advanced 3D package testing
(2) Develop test automation solutions
(3) Conduct Statistical Analysis and Data Mining
(4) Cooperate with cross-functional engineers and vendors
2. Testing Probe Card R&D
(1) Define advanced testing hardware technology architecture
(2) Create world-class methods and role model tech structured problem solving
(3) Conducts advanced electrical/mechanical/thermal analysis and PI/SI improvement
Job Qualifications
1. Testing Program R&D
(1) Master’s degree or above in Electrical/Electronic engineering, Computer engineering, Communication, Optical electronics or related fields.
(2) Solid technical understanding of semiconductor testing concept.
(3) Familiar with programming language.
(4) Hands-on participation and a strong sense of ownership.
(5) Fluent in English and exhibit good communication skills to work within cross-functional teams.
2. Testing Probe Card R&D
(1) Master’s degree or above in Electrical/Electronic engineering or related fields.
(2) Solid understanding of electronic circuits/fields.
(3) Familiar with measurement equipment and simulation tools (HFSS, SIWave, Designer).
(4) Experienced in power management or High speed/RF circuit design, including schematic/layout/testing is a plus.
(5) Knowledge in electromagnetic and background on transmission line theory is a plus.
(6) Hands-on participation and a strong sense of ownership.
(7) Fluent in English and exhibit good communication skills to work within cross-functional teams.
The Intel Common Platform Foundry Alliance