What happened to Intel's Core roadmap during the 10nm debacle?

[Xebec]

The pain in Intel's transition from 14nm to 10nm is pretty well documented, but I was wondering what were Intel's original plans for Desktop and Server architectures before 10nm started to slip? (What cores were we supposed to have, besides Cannon Lake - what was removed from the roadmap, etc.)

...
Actually launched:

2015 - 14nm Skylake, ~ on time after Broadwell delayed
2016 - 14nm+ Kaby Lake (but was supposed to be 10nm Cannonlake)
2017 - *14nm++ Coffee Lake 6 core, 14nm Whiskey Lake for Mobile
2018 - 14nm++ Coffee Lake 8 core, and 1 SKU only of Cannon Lake for Chinese market (heavily disabled, low clocks)
2019 - 14nm Comet Lake and 10nm Ice Lake (mobile only - relatively low clocks and volume)
2020 - 14nm Rocket Lake and 10nm Tiger Lake (limited volume, but healthy frequencies)
2021 - 10nm Alder Lake, 10nm Ice Lake Servers
2022 - 10nm Raptor Lake
2023 - 10nm Raptor Lake Refresh, "4nm" Meteor Lake (somewhat limited volume, originally labeled "7nm"), Sapphire Rapids (launched 2 years late?)
2024 - (Arrow Lake)
2025 - (Arrow Lake Refresh)

*Node performance was substantially improved over base 14nm

Was the Desktop Roadmap supposed to be:

2016 - ***10nm Cannon Lake (up to 8 cores on desktop)
2017 - 10nm Ice Lake
2018 - Tiger Lake??
2019 - Meteor Lake ??
2020 - Alder Lake on "7nm"?
2021 - **Sapphire Rapids on 7nm?

**An Intel investor meeting in 2019 said Sapphire Rapids would be a 2021 launch.
*** Cannon Lake mentioned as a 2015 production target: https://web.archive.org/web/2018021...om/show/12436/intel-10nm-dualcore-cannon-lake Core count: https://www.tomshardware.com/news/intels-unreleased-10nm-cannon-lake-cpus-emerge

 

[tomatoma]

Personally, I wish I could have introduced Intel4 (7nm generation by other companies) early...
intel The Intel 10nm itself has a fairly good performance.
Although it is said to be the 10nm generation, it is competing with the processes of other companies' 7nm generation.
The problem is that Intel has increased the required performance of 10nm too much, which also leads to delays

 

[semiman]

When Cannon Lake messed up, everything started to wrong. Cannon lake wasn't supposed to simple die shrink, but with new architecture as well(a.k.a Palm Cove). These cove architectures are very foundation of Intel P cores today, ranging from laptops to large server CPUs(to Emerald Rapids). This left long lasting effects to all Intel Products' offerings.