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TSMC Repurposing Old Fabs to Bring EUV Pellicle Production In-House

Besides being expensive on their own, EUV pellicles limited throughput due to transmission as well as rupturing or destabilizing faster at higher power. So pellicle-less procedures have been developed. DUV pellicles are much cheaper and do not limit throughput this way but still need to deal with haze.
For sure, all I meant was at least as far as I understand, of the 4 large manufacturers (Intel, Samsung, TSMC, GF) Intel has been using pells the longest and have been the most dedicated historically. I had heard of internal debates about how Intel was wasting its time with pells because TSMC just took the cost hit to the masks over the loss of MA and that allowed them to just take higher supply and seem more stable to customers.
I am unsure how accurate what I was told was, but essentially it was that early EUV, especially lower power era, Intel was only pell user for a few years.

I can't verify any of this it was all anecdotal conversation with employees from different companies. I had just heard for a few years that Intel was the only one deep into Pellicles and wasnt sure if there'd be a pay off and if they had ever made the evaluation to do things inhouse like this
 
For sure, all I meant was at least as far as I understand, of the 4 large manufacturers (Intel, Samsung, TSMC, GF) Intel has been using pells the longest and have been the most dedicated historically. I had heard of internal debates about how Intel was wasting its time with pells because TSMC just took the cost hit to the masks over the loss of MA and that allowed them to just take higher supply and seem more stable to customers.
I am unsure how accurate what I was told was, but essentially it was that early EUV, especially lower power era, Intel was only pell user for a few years.

I can't verify any of this it was all anecdotal conversation with employees from different companies. I had just heard for a few years that Intel was the only one deep into Pellicles and wasnt sure if there'd be a pay off and if they had ever made the evaluation to do things inhouse like this
In 2006, Intel talked about a non-removable pellicle "as a backup approach to the pellicle-less methods pursued by suppliers and EUVL partners." The paper is here: EUV Pellicle Development for Mask Defect Control. If they're using pellicles now, it would have to be the one from Mitsui (which TSMC also published about here). Basically, TSMC reported changing EUV pellicle materials 3 times in 2020-2023. But at 400W, the 2023 material was facing a "lifetime challenge." In 2024, the power went up to 500W with the NXE:3800.
 
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For sure, all I meant was at least as far as I understand, of the 4 large manufacturers (Intel, Samsung, TSMC, GF) Intel has been using pells the longest and have been the most dedicated historically. I had heard of internal debates about how Intel was wasting its time with pells because TSMC just took the cost hit to the masks over the loss of MA and that allowed them to just take higher supply and seem more stable to customers.
I am unsure how accurate what I was told was, but essentially it was that early EUV, especially lower power era, Intel was only pell user for a few years.

I can't verify any of this it was all anecdotal conversation with employees from different companies. I had just heard for a few years that Intel was the only one deep into Pellicles and wasnt sure if there'd be a pay off and if they had ever made the evaluation to do things inhouse like this

GF have never ordered a single mask without pellicle to my knowledge at least not from us.
 
Yes, DUV and i-line use always has pellicles.

I went to have a look at our current EUV product and none have pellicle , which is interesting for someone on the other side as the EUV masks usually have smaller structures so more suseptible to particle impact and such like, so would have thought pellicle even more important.

When a mask is without Pellicle , I assume its closer to thr wafer during the FAB litho process is that correct?
 
I went to have a look at our current EUV product and none have pellicle , which is interesting for someone on the other side as the EUV masks usually have smaller structures so more suseptible to particle impact and such like, so would have thought pellicle even more important.
You can also consider that the pellicle also becomes a defect source with more EUV absorption.
When a mask is without Pellicle , I assume its closer to thr wafer during the FAB litho process is that correct?
The mask position is not affected.
 
This looks very relevant: Real-time observation of EUV-induced blister formation at various sample temperatures in pellicle-like materials

In this study, we investigated degradation mechanisms on pellicle-like, semi-amorphous, 50 nm SiN thin films exposed to both isolated hydrogen radicals and isolated extreme ultraviolet (EUV) radiation in vacuum at temperatures of 50°C, 120°C, and 300°C. For EUV radiation, real-time, in-situ ellipsometry monitored surface changes without reactive gases, isolating pure EUV photon effects. For isolated hydrogen radical exposure, we have not observed any chemical and morphological changes in the thin films. For isolated EUV photons exposure, results strongly depend on temperature. At 50°C, localized and limited blistering occurred, while exposure at 120°C showed no blister formation due to atomic mobility enhancing self-healing within the amorphous matrix. At 300°C, extensive blistering was driven primarily by stress at the film-substrate interface. Contrary to the conventional idea of gradual blister growth, ellipsometric imaging revealed sudden, varied-size blister formation directly linked to local EUV dosage. In-situ XPS, TOF-SIMS, NRA, optical microscopy and SEM complemented post-exposure analyses. Our findings offer critical insights into degradation mechanisms and blister formation and evolution mechanisms, enhancing the durability and reliability of pellicles and other optical components in EUV lithography, notably for ASML EUV lithography systems.
 
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