Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/tsmc-discloses-n2-defect-density-lower-than-n3-at-the-same-stage-of-development.22699/page-3
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

TSMC Discloses N2 Defect Density Lower Than N3 At The Same Stage Of Development

Just watched this video

Around the minute 8. According to Ben the presenter, their "best wafer" yield is typically a good leading indicator of "median wafer" yield in the upcoming quarters. And their current "best wafer" yield already exceeded HVM median wafer yield target (presumablly somewhere around 0.1-0.15 D0).

Furthermore, the same guy said, overall this 18A yield is equal or better than the yield Intel had for all the leading edge processes in the last 15 years, even including 22nm.

WOW, that explains why 18a has external customers lined-up around the block.
 
WOW, that explains why 18a has external customers lined-up around the block.
Wow, even a perma-bear for Intel got excited!

You know better than this, fansink -- customers made that decision 12-18 months ago.

However, they will factor this in when they make their next decisions. :)
 
Wow, even a perma-bear for Intel got excited!

You know better than this, fansink -- customers made that decision 12-18 months ago.

However, they will factor this in when they make their next decisions. :)

So, when Pat talked about the 18a external customers, which we now know was total BS, but when Tan talks about their "lead customers on 14A", that's money in the bank.
 
Just watched this video


Around the minute 8. According to Ben the presenter, their "best wafer" yield is typically a good leading indicator of "median wafer" yield in the upcoming quarters. And their current "best wafer" yield already exceeded HVM median wafer yield target (presumablly somewhere around 0.1-0.15 D0).

Furthermore, the same guy said, overall this 18A yield is equal or better than the yield Intel had for all the leading edge processes in the last 15 years, even including 22nm.
If they are saying 22nm than it must be good cause it was the last good, undelayed and revolutionary node.
 
Back
Top