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Great article, Thanks for the link. It definitely points to another option going forward in SOC design. It makes me wonder why this wasn't done before. That's one question I have for the SemiWiki community if anyone has some input on this.
I checked with a top scientist I know and he felt this is a dramatic use of technology that could fundamentally change the semi industry. Does anyone feel the same way or have a counter argument?
The pattern of industries shifting from integrated to modular usually causes a lot of big business changes and also improves the rate of innovation. This was accross a variety of industries.
So if the technical perspective here is true - that you can build modular chips while retaining performance/cost - this could be fundamental.
The idea is great, building modular chips instead of massive SoC. In fact it push the reuse concept from IP to IC. Interesting, Sutardja doesn't plan to use MCP (too expensive?). I assume that MCP would partly reduce power dissipated in the interconnects (probably one drawback, but we need further evaluation to know how much extra-power).
From a business perspective, DRAM manufacturer should lobby against the idea. Interface IP vendors should not be happy too, or change their business model, as they will sell one time for one chip, which will be reused in multiple apps instead of building one SoC for one apps...
And it would be very interesting to see if he could make this dram cache idea successful despite the strong resistance by DRAM makers, and how will he do it.
Arguments for SIP have always been the same but never stopped SoC development. I think the big companies need the SoC concept to dominate IP in key products, i.e., processors. Another factor is that many technologies that can potentially bring out the advantage of SIP-integration, like III-V, MEMS, are still not cost-effective enough to be high-volume.
