The Most Expensive Essential in AI Chips: HBM
The supply situation for the next-generation HBM4 will primarily hinge on the uncertainty surrounding Samsung's development progress. Notably, SK Hynix has publicly announced that HBM4 will continue to utilize the MR-MUF stacking method. The most significant difference between HBM4 and previous versions of HBM lies in the base die process. Instead of the DRAM process traditionally produced by DRAM manufacturers, the base die will adopt FinFET technology from foundries.
The base die is a critical component connecting AI chip GPUs and DRAM, situated at the bottom of HBM and functioning as the controller between the GPU and memory. It is reported that SK Hynix is collaborating with TSMC to develop the HBM4 base die. To cater to varying customer demands, the ongoing development includes versions based on TSMC's 12FFC+ (N12) and N5 process technologies.
HBM is exceptionally expensive, costing 2–3 times more than traditional DRAM. It is also the most significant cost component in AI chips, surpassing even TSMC's wafer fabrication services.
According to online information, a teardown of the NVIDIA H100 GPU revealed that its production cost is approximately $3,000. Among the components, the largest cost comes from SK Hynix's HBM memory, which accounts for around $1,500. This far exceeds the costs of chip manufacturing and packaging, making HBM memory the most significant contributor to the GPU's production cost.
However, the H100 is priced at an astonishing $35,000, with a gross profit margin exceeding 90%, making it a product with luxury-level profitability.
Currently, among global DRAM manufacturers, only three companies—SK Hynix, Samsung, and Micron—possess the capability to produce HBM. This is because HBM requires advanced packaging and interposers, which few companies can provide. Essentially, TSMC holds a dominant position in HBM and interposer packaging through its CoWoS technology. This is a key reason why SK Hynix is seeking collaboration with TSMC.
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