You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
Personally, I think Intel should and will continue Xe development including their rack scale, enterprise, and client solutions. If they pull the plug, it will be their “mobile 2.0” moment.
I think accelerators and AI are the future as well. Any idea how much Xe product Intel sold last year, though ? And what were the COGs/margins ? Seems like the only products were some HPC supercomputers and ARC. I was able to dig up a few datapoints, but it very much seems like they missed the market, without a clear path forward to where the "puck is going". But maybe you see things differently ? I have to admit that I have a very AI-first view on the accelerator market.
• Intel’s Arc Xe GPU market share for discrete desktop graphics cards dropped to approximately 0% in Q2 2024, indicating near-negligible unit sales compared to Nvidia and AMD.
• Most industry trackers did not break out an explicit sales figure for Intel Xe silicon, since shipments fell below thresholds typically reported (less than 1% market share equates to fewer than 100,000 units for the quarter globally).
• The Aurora exascale supercomputer at Argonne National Laboratory is one of the most prominent HPC projects using Intel Xe HPC architecture. It integrates Intel Xeon Max CPUs and Ponte Vecchio Xe HPC GPUs to enable exascale computing performance. The system is designed for diverse HPC workloads including AI, scientific simulations, and big data analytics
The on-chip Xe IP is a little different - fabbed in Intel process, part of SoC. But all the rest of the Xe silicon was fabbed at TSMC, right ? Or maybe I'm missing something ?
The on-chip Xe IP is a little different - fabbed in Intel process, part of SoC. But all the rest of the Xe silicon was fabbed at TSMC, right ? Or maybe I'm missing something ?
The on-chip Xe IP is a little different - fabbed in Intel process, part of SoC. But all the rest of the Xe silicon was fabbed at TSMC, right ? Or maybe I'm missing something ?
Intel 7 was only used for the base tile. Funny how most of the articles about Ponte Vecchio say it was fab'd at Intel. Perhaps that's because it was packaged by Intel.
Thanks for the reminder - I guess I was thinking of IRIS Xe. BTW - Thanks for raising the unspoken challenge for Intel - At least since Intel 14nm and down, they really haven't had a suitable process for dense, high-capacity GPUs.
The on-chip Xe IP is a little different - fabbed in Intel process, part of SoC. But all the rest of the Xe silicon was fabbed at TSMC, right ? Or maybe I'm missing something ?
On the server side, Intel’s Ponte Vecchio GPU was a short-lived product built using components manufactured on TSMC’s N5 and N7 nodes, as well as Intel 7. One of its primary purposes was to rescue the troubled, years-delayed Aurora supercomputer project at Argonne National Laboratory.
The Aurora supercomputer was originally scheduled to go live in 2018, but after four delays spanning six years, it finally went online in 2024/2025. In late 2021, Intel even recorded a $300 million write-off for penalties and re-engineering costs related to this $500 million project.
"Intel later confirmed at Architecture Day 2021 that Ponte Vecchio would use Compute Tiles manufactured on TSMC N5, Base Tiles and Rambo Cache Tiles manufactured using Intel 7 (previously referred to as 10 nm Enhanced SuperFin) and Xe Link Tiles manufactured on the TSMC N7 process. The new GPU is expected to be used in Argonne National Laboratory's new exascale supercomputer, Aurora, with compute nodes comprising two next generation Intel Xeon (codenamed "Sapphire Rapids") CPUs, and six Ponte Vecchio GPUs."