Lip-Bu Tan Update on 18A and 14A

[tomatoma]

They may, indeed, make that choice. However, I would caution against setting expectations based on Intel's past behavior. Intel has had two CEO's that weren't steeped in the Intel culture.

The first was Bob Swan who, if rumors are to be believed, was looking to divest Intel of its fabs. Heresy to the old guard who bleed blue. He was also making significant changes to the culture that were designed to move Intel away from the twisted version of the Grovian culture that had grown up over time. Just my opinion, but I think Andy Grove was rolling over in his grave when he saw what the culture he had fostered had become. A culture where data was ignored and people were afraid to question decisions wasn't what Grove advocated for.

The second is Lip-Bu Tan. Like Swan, he is an outsider and less interested in doing things the Intel way. From all I hear, he is doing far more than giving lip service to the idea of listening to the customer. It will be a long journey (I've seen statements that he committed to 10 years in the CEO role), but sees a very different company at the end of the road than his predecessor. Gelsinger seemed to want to raise the old Intel from the ashes, but Lip-Bu Tan seems like he wants to fundamentally change the company. I believe his approach is far more pragmatic and the changes he is driving in Intel culture will result in a very different company from the Intel of the past.

Even though the methods of realization are different, I think it can be said that LBT agreed with Gelsinger's ideas to some extent when they didn't give up on the fab...

 

[lispwright]

So do you think Intel wafer cost is higher or lower than TSMC's, or at least be more competitive than TSMC?

I'm not sure it matters a lot for my thesis, as long as the difference is not "huge." See dkr1986's reply for that sort of analysis.

But I'd like to know why Intel chose N3B for Lunar and Arrow Lake. As far as I can tell, for whales who get press, Apple is the only other customer, using it for the M3 line and A17 but not following ones.

Isn't it an "orphan" node, with limited HVM experience? It's not PDK etc. compatible with the other N3 nodes, which are classed as being part of the N5 family. And from the claims that N2 is projected to be more used than the N3 families, I assume that's because TSMC mastered GAA with it, and it's more like what N3B should have been.

For Intel was that a valid decision at a point in time, was it "fair," vs. being picked because it was the highest price TSMC node to make Intel Foundry look better? For I'm generally betting on this of your two Intel failure theory options, things I've observed for decades:

Or do we believe Intel’s problems have nothing to do with the IDM business model? Instead, is the real issue that over the past 20 years Intel consistently hired poor engineers, ineffective managers, weak boards of directors, and bad CEOs who made bad decisions?

Or some of both, but with IDM weakness being dominated by bad management. Including IDM being much more vulnerable to that since you have to be good at two difficult things at once. And highest end logic fabs are the hardest.

However you assign the blame, clear weaknesses of Intel were illustrated by the 10 nm debacle. Would a design only Intel have stuck with a failing other company foundry node for years, vs. the history of e.g. all of Samsung's whale customers moving to TSMC?

And staying there except maybe some of Musk's business, which I interpret as a bet Samsung might just pull it off, if so valuable with TSMC being so booked? Which is also getting orders of similar size, "2 billion dollars" I read being thrown around for both.

 

[MKWVentures]

Exactly as you say I suppose. It will be under "Income attributable to non-controlling interest" and will be deducted before the "Net income attributable Intel investor" is calculated. Net income, Earnings per Share and Operating & Free Cash Flow metrics will be lower. Also I would not assume that since Brookfield owns 49% of the Fab & tools, they would be entitled to 49% of the profit. It will be much lower in my opinion as Intel operates the fab & owns the IP being produced in the fab. It is like leasing a co-owned property. I don't know if that is 20% or 30% but definitely cannot be 49% (if it is then the CFO is a fool).

We need to keep in mind Intel Product is already paying high wafer prices to TSMC (including 50% TSMC gross margin). So high wafer price for a leading-edge node is already accounted for in recent times for Intel Products team. It is a matter of ramping down Arrow lake+ Lunar Lake volume and increasing Panther Lake volume to offset. Considering 18A based products are much better than Arrow Lake & lunar lake (yes, all things indicate PTL is a better product than the ARL & LNL so far), ASP increase for 18A based products can be incremental. So, I think as 2026 progresses, Intel Product margins should stay flat. The threshold is Intel 18A wafers starting to eat into Intel 7 wafers volume (as opposed to N3), then product margin will start taking some hit. is the 18A based product ASP increase enough to offset 18A wafer ASP increase is a question, I don't have answer for yet. I have not accounted to demand destruction due to high memory prices.

On the foundry side, the 18A ramp cost would eat into margins but 18A wafer price would help margins. If yield is decent, the more they use foundry, the more the economics of foundry look good. If the cost of 18A wafer is higher than 18A wafer price due to low yield, then nothing changes and foundry bleeds money. But even these changes over time as yield improves. I only see margin improvement for Intel Foundry from here after some startup costs during initial ramp. The bigger problem is idle older node fabs that not producing anything or being underutilized.

Lets see what the intel report out shows in this quarter and next quarter. Not sure all of the impacts and what changes Intel makes. I am very interested on the Brookfield impact.

some thoughts:
1) 18A wafer cost will not be equal to TSMC N2 or N3. The Wafer price charged to Product group should be same as N2. So we should be able to see impact on product and IFS margins (this impact was clear on Intel 4, which lowered IFS margins).
2) 18A cannot be cost effective in 2026, Low volumes, outs per tool challenges, Low yield. Even at full ramp in Fab 52 by Q1 2027, that is still relatively low volume,
3) I am not sure how panther lake will ramp. Arrow lake and Meteor lake and lunar lake are incompatible designs with different ballouts. I am not sure how OEMs are redesigning. I think it is possible that Lunar and Arrow ramp throughout 2026. Hopefully they tell us but a good question is "do you expect to sell 40M Panther lake units in 2026???"... they should easily if everything is working well. And Nova lake is the desktop replacement end of year. and we have Arrow lake refresh coming out.
4) On the memory side: what is the impact of Intel paying for memory on Lunar lake vs ODM buying it on Panther lake. I dont know but it should be significant one way or the other given DDR5 prices doubled.

Hopefully we get some inputs from DZ and LBT

 

[hist78]

Or some of both, but with IDM weakness being dominated by bad management.

After two decades of setbacks and failures tied to Intel’s management missteps, it’s reasonable to ask whether these failures are truly the fault of those Intel executives or whether they are an inherent outcome of the IDM business model itself.

I believe that as long as the IDM model remains a fixed doctrine that cannot be meaningfully changed, Intel is likely to continue making strategic and operational mistakes. It’s not because its executives lack ability or good intentions, but because the underlying IDM model leads them or forces them into those disasters.