Intel’s Pivot: Why It’s Betting on UMC—Not TSMC—in the Legacy Node Wars

[cliff]

The lion share of all chips will never use FINFET nodes for near zero benefit for low speed, small die size, utilitarian ICs.

WIthout automation ... perhaps.
With automation... disagree.

28nm leaks like crazy
22fdsoi... probably not much cheaper than finFETs.
16-12 has routable contacts. Saves 2 pitches stdcells, 2 extra layers (2x).

We are 100% bought into these DUV finFET processes... and we automated them. 16-12nm + interposers will be the sweet spot. We are betting on it.

EDIT: I should add that I am talking about TSMC and GF. I have never used an Intel process.

 

[siliconbruh999]

These two nodes seem quite similar, unless the TSMC-like naming threw me off.
TSMC puts 12 and 16 in the same family: https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_16_12nm

View attachment 3367
MediaTek is already an Intel 16 customer.

Well Intel 16 can be based on 22nm and 12nm can be based on 14nm and the differences between Intel 14nm and 22nm is substantial.
This is just guesswork on my part though.

 

[Fred Chen]

Well Intel 16 can be based on 22nm and 12nm can be based on 14nm and the differences between Intel 14nm and 22nm is substantial.
This is just guesswork on my part though.

I've read that 12nm was supposed to be comparable to TSMC's 12nm, and I assumed the '16' in Intel 16 nm likewise was supposed to compare to TSMC's 16nm.

 

[siliconbruh999]

I've read that 12nm was supposed to be comparable to TSMC's 12nm, and I assumed the '16' in Intel 16 nm likewise was supposed to compare to TSMC's 16nm.

Intel 14nm is better than TSMC 12nm and 22FFL should be in the same ballpark

TSMC 16nm/ Intel 16 is 22nm FFL i have read that somewhere can't remember the source

14 nm lithography process - WikiChip

The 14 nanometer (14 nm) lithography process is a semiconductor manufacturing process node serving as shrink from the 22 nm process. The term '14 nm' is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch.

en.wikichip.org

you can search wikichip for rest of the details

For TSMC 12nm vs Intel 14nm

and if we take wikipedia and wikichip as reference 14nm is better than tsmc 12nm

sorry for the image spam

 

[Paul2]

interposers

Just that alone means that this will not be reaching the level of $1 MCUs, which is a gigantic market. 1000+ dies per wafer ICs are already too small to comfortably fit contact pads for cheaper packaging methods, but too cheap for substrates, and panel based packaging. And they are already shipping in giant volumes while using relatively small wafer order quantities.

 

[Fred Chen]

Intel 14nm is better than TSMC 12nm and 22FFL should be in the same ballpark

TSMC 16nm/ Intel 16 is 22nm FFL i have read that somewhere can't remember the source

14 nm lithography process - WikiChip

The 14 nanometer (14 nm) lithography process is a semiconductor manufacturing process node serving as shrink from the 22 nm process. The term '14 nm' is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch.

en.wikichip.org

you can search wikichip for rest of the details
View attachment 3453



View attachment 3454


For TSMC 12nm vs Intel 14nm
View attachment 3455

and if we take wikipedia and wikichip as reference 14nm is better than tsmc 12nm
View attachment 3456

sorry for the image spam

OK, so if Intel/UMC 12 nm is more advanced than Intel 14 nm, then it should be substantially different from Intel 16.

 

[siliconbruh999]

OK, so if Intel/UMC 12 nm is more advanced than Intel 14 nm, then it should be substantially different from Intel 16.

Intel/UMC 12nm is most likely the same level as 14nm(rebranding 14nm as 12nm) that's just my expectations but yes it should be substantially different from Intel 16. The PDK is not out yet so i can't comment what's the spec ut's just my estimate based on the public info.

 

[eding42]

Intel/UMC 12nm is most likely the same level as 14nm(rebranding 14nm as 12nm) that's just my expectations but yes it should be substantially different from Intel 16. The PDK is not out yet so i can't comment what's the spec ut's just my estimate based on the public info.

Really wonder if UMC can attract any customers to this node. Intel's future might be riding on it. Remember, Intel says they only need mid-single digit billions of external revenue to break even for foundry.

 

[cliff]

Just that alone means that this will not be reaching the level of $1 MCUs, which is a gigantic market. 1000+ dies per wafer ICs are already too small to comfortably fit contact pads for cheaper packaging methods, but too cheap for substrates, and panel based packaging. And they are already shipping in giant volumes while using relatively small wafer order quantities.

Please rephrase

 

[Paul2]

Please rephrase

Tiny, very cheap ICs priced below $1 cannot afford advanced packaging, and don't benefit from performance gains of sub-40nm nodes.

You can't make their already tiny dies any more smaller, because of die space for contact pads, power, and analog circuitry.

 

[cliff]

You are talking about $1 chips? I think I lost you.

 

[Paul2]

You are talking about $1 chips? I think I lost you.

Yes, I am talking about cheap chips that are used in great numbers.

 

[cliff]

Not my bag. I am commenting on the other kind of 16-12nm customer. Custom ASICs to replace FPGAs, increase performance, decrease power. Your comment referred to the commodity market. Got it.

 

[blueone]

Custom ASICs to replace FPGAs, increase performance, decrease power.

A good strategy, IMO.