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Inside Intel’s new Arizona fab, where the chipmaker’s fate hangs in the balance

Daniel Nenni said:
No way does TSMC packaging margins align with the corporate 55-60% margin but I'm sure it is more than the 15% industry packaging average. I did hear that TSMC packaging revenue is steadily increasing and may hit 10% of total revenue. CoWos is all the rage these days, especially at N3 and who doesn't use TSMC N3? Go TSMC!
Click to expand...

Doesn't TSMC basically have a captive audience with advanced packaging at this stage? Couldn't they generate a pretty high margin for some of the packaging they do?
 
Xebec said:
Doesn't TSMC basically have a captive audience with advanced packaging at this stage? Couldn't they generate a pretty high margin for some of the packaging they do?
Click to expand...

Does this benefit the paying public who are ultimately the end user.

What is the point for TSMC to completely turn over their customers?

Or they gonna get extra margin out of their own suppliers?

Wouldn't the industry operate better if it was complimentry as opposed to constantly looking to squeeze down?
 
Xebec said:
Doesn't TSMC basically have a captive audience with advanced packaging at this stage? Couldn't they generate a pretty high margin for some of the packaging they do?
Click to expand...
TSMC is not the only company that can provide advanced packaging. Intel is not the only company with EMIB like process.

But the GPU is made by TSMC. So it is easier for them to do it. HBM is made and packaged by memory companies and integrated onto the interposer.

I think the big growth in next 5 years will be the OSAT vendors doing advanced packaging.... including for TSMC customers.
 
MKWVentures said:
TSMC is not the only company that can provide advanced packaging. Intel is not the only company with EMIB like process.

But the GPU is made by TSMC. So it is easier for them to do it. HBM is made and packaged by memory companies and integrated onto the interposer.

I think the big growth in next 5 years will be the OSAT vendors doing advanced packaging.... including for TSMC customers.
Click to expand...
Is advanced packaging basically limited to the "last three standing" foundries (<7nm) at this point, or are there a number of other outfits that can do it (and actually do it for whales like Nvidia?)

Thanks!
 
Xebec said:
Is advanced packaging basically limited to the "last three standing" foundries (<7nm) at this point, or are there a number of other outfits that can do it (and actually do it for whales like Nvidia?)

Thanks!
Click to expand...
Major OSATs can do all advanced packaging and have been proposing it for years.
They are doing subcontracting for some major players today that people do not realize.

two challenges:
1) they need high volume to get the scale they are used to. .... that is coming obviously.
2) The integration of the chips fab and the interposer and stress effects etc is not always easy to manage. that is where TSMC leads today. It was solved on every other package and it will be solved with EMIB/CoWoS type packaging.

question: What percentage of CPUs/GPUs/XPUs currently use CoWoS or EMIB or Foveros?
 
MKWVentures said:
question: What percentage of CPUs/GPUs/XPUs currently use CoWoS or EMIB or Foveros?
Click to expand...
EMIB - nearly ALL Intel Xeons FROM 4th generation Xeon CPU except for monolithic one
CoWoS - AMD/NVIDIA GPU (MI 250/300/350) NVIDIA DC GPU From A100 to everything after it. Google TPUs Amazon Trianium
Foveros -> Intel Client CPUs from Meteor Lake onward.
all major ones i can remember from off my mind
 
MKWVentures said:
Major OSATs can do all advanced packaging and have been proposing it for years.
They are doing subcontracting for some major players today that people do not realize.

two challenges:
1) they need high volume to get the scale they are used to. .... that is coming obviously.
2) The integration of the chips fab and the interposer and stress effects etc is not always easy to manage. that is where TSMC leads today. It was solved on every other package and it will be solved with EMIB/CoWoS type packaging.
Click to expand...

Thanks! I had it in my head that advanced packaging must be complex/expensive enough these days that only the top foundries had the resources to do it for the latest silicon. Glad to hear that's not the case. This would definitely explain packaging being lower margin for TSMC too.

Thanks again.
 
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