Hi. So I'm a student at Binghamton University's EECE department. We use the Papilio Duo boards (plus the LogicStart shield, but that's not relevant) for our design courses. I (and many others in my class) have been having an issue with writing FPGA bit files to the persistent SPI flash memory. Using Papilio Loader (or even papilio-prog) to write to the FPGA directly works fine, but it needs to stay plugged into the computer, and it loses the program when you disconnect the power.<o
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When I try to write to SPI Flash, the program output does not indicate any problems. It indicates it could erase, verify erase, write, and verify successfully. But then nothing functions, even when I remove and reapply power. It starts working again when I load the file to FPGA directly.<o></o>
I already pick up something about the basic introduction and design flow of Programmable Logic Device FPCA (if your are interested, could check it out here: Basic Introduction and Design flow of Programmable Logic Device FPGA) but after i have tried this following the same procedure using multiple computers (Linux, Windows, OS X) [FONT=宋]i [/FONT]still have this problem. I have tried both SW1 positions to no avail, I have tried pressing the "FPGA Reset" button, and I have tried triggering an FPGA reconfiguration using papilio-prog. Nothing seems to help. Is there a known fix for this, or should I contact support to request an exchange? Note that I was able to program to SPI Flash successfully until about a month ago. (I can't think of anything that should have caused this change). Thanks.
></o>When I try to write to SPI Flash, the program output does not indicate any problems. It indicates it could erase, verify erase, write, and verify successfully. But then nothing functions, even when I remove and reapply power. It starts working again when I load the file to FPGA directly.<o
></o>I already pick up something about the basic introduction and design flow of Programmable Logic Device FPCA (if your are interested, could check it out here: Basic Introduction and Design flow of Programmable Logic Device FPGA) but after i have tried this following the same procedure using multiple computers (Linux, Windows, OS X) [FONT=宋]i [/FONT]still have this problem. I have tried both SW1 positions to no avail, I have tried pressing the "FPGA Reset" button, and I have tried triggering an FPGA reconfiguration using papilio-prog. Nothing seems to help. Is there a known fix for this, or should I contact support to request an exchange? Note that I was able to program to SPI Flash successfully until about a month ago. (I can't think of anything that should have caused this change). Thanks.