Hi Daniel,
Thank you for the quick reply. The information you gave me is very valuable. While you are right in terms of number of competitors in a submarket, I will control for that in my analysis (by putting a variable of fab count in the regression). Let me elaborate a little more to tell more about what I am doing and what I think is the pattern in industry.
Here is what I have been working on so far in a nutshell:
I try to come up with a new theory in my thesis, which I call ‘Entry Diversion’, where entrants are 'diverted' between submarkets rather than deterred completely from the industry. Looking at the industry composing of heterogeneous submarkets (in semiconductor manufacturing these could be analogs, discretes, MEMS, logic, memory chips etc.), I propose that occupancy by incumbents in main focal submarkets conditions new entrants’ incentives from imitating the incumbent to finding new sources of growth, i.e., coming up with new products by opening new submarkets.
As we all know, scaling production either through chip geometry miniaturization, or wafer size enlargement provided improved functionality per chip. Looking at these important characteristics of semiconductor fabrication, i.e., shrinking geometries and increasing wafer sizes, we can map submarkets on a two-dimensional scale: one dimension with 'geometry' or ‘die size' in microns, and another dimension with 'wafer size' in millimeters/inches (see attached graph). As we know, depending on the size of the wafer and the chip geometry, any number from tens to tens of thousands of dies can be processed on a wafer. In such a submarket-map, high capacity production plants (fabs) that focus on commodity chip production, such as memory or logic chips, would be located in the high-wafer size and low geometry section, whereas low capacity ones with more particular product characteristics, such as discrete chips (especially LEDs and Optos), analogs, and even MEMS, would be located towards the other extreme, in the high geometry but lower wafer size part.
The entry pattern observed in recent years is that new fab entry occurs in discretes such as LEDs, optos and MEMS submarkets, whereas memory and logic submarkets have practically 'zero' entry. My question is: are there any fabs/foundries that were previously planning to enter into memory/logic submarkets, however since they cannot catch the scale economies through the wafer size and geometries that TSMC, Intel etc. type of giants have, they changed their mind and 'diverted' their entry into discretes or MEMS submarkets?
Thank you.
Bilgehan Uzunca
PhD Candidate, IESE Business School, University of Navarra,
Strategic Management Department
Avda. Pearson, 21 | 08034 Barcelona, Spain
+34.66.479.97.76 |
buzunca@iese.edu
IESE - Bilgehan Uzunca
Bilgehan,
Good morning.
When a company sets up a fab they have to understand their end market first, before building the fab, because the equipment, process steps and skills used in fabrication of Memories is quite different than that for the design of MEMS.
If a market is easy to enter, then you will have more competitors attracted to that market which then makes it more difficult to enter.
I wouldn't say that any IC market is easy to enter, because you have to build awareness for your fab, hire sales and application people, get design wins, build proof and credibility, pay for the fab, then offer something different than your competitors.
In general the number of fabs has been slowing worldwide because with each new smaller process geometry one new fab can produce many more chips per wafer than the previous, larger geometry generation.