siliconbruh999
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Barcelona, Spain – The first tape-out of test chips of the Cinco Ranch RISC-V processor are sent to Intel for manufacturing.
The milestone marks a crucial phase for the Barcelona Zettascale Laboratory (BZL) project, coordinated by the Barcelona Supercomputing Center (BSC), a pivotal initiative aimed at enhancing Europe’s technological sovereignty in high-performance computing (HPC) chip design and manufacturing.
The tape-out of these chips, following their fabrication with Intel Foundry Systems, positions the BSC closer to its goal of producing its own chips with European technology.
The adoption of RISC-V is a strategic move, an open standard conceived in 2010 to reduce the growing complexity of microprocessor instruction sets and limit heavy dependence on chip producers in third countries. This approach mirrors the democratizing effect Linux had on software, now extended to hardware.
The processor integrates three distinct custom cores, each selected for specific computational needs. These include the Sargantana, an in-order single-issue RV64G core tailored with custom extensions for genomics sequence alignment; the Lagarto Ka, a dual-issue out-of-order core featuring a 16-lane Vitruvius RVV1.0 Vector Processing Unit (VPU); and the Lagarto Ox, a powerful 6-way out-of-order RV64GC core.
Source: BSC
Additionally, Cinco Ranch boasts a three-level cache hierarchy, including a shared L3 cache based on OpenPiton, and support for modern interfaces like DDR5 and PCIe Gen3.
These high-performance chips are not merely for supercomputers; their ultimate goal is to be deployed worldwide in diverse applications, such as autonomous cars and artificial intelligence (AI) devices.
The project aims for new levels of performance and energy efficiency, aligning with the BZL’s broader objectives of developing RISC-V general-purpose processors and VPU accelerators for HPC, with a strong emphasis on sustainability.
Prof. Mateo Valero (source: BSC)
Speaking to EE Times, Mateo Valero, the principal investigator of the BZL project and Director of the Barcelona Supercomputing Center, emphasizes this vision: “Cinco Ranch is a clear step forward in our goal to develop European technology for High Performance Computing.”
Valero has consistently advocated for Europe to end its dependence on chips, stating that without high-performance chips, there is “no artificial intelligence, no supercomputing.”
This pioneering collaboration, announced in June 2022, represents a significant investment of up to €400 million over 10 years, funded jointly by Intel and the Spanish Government through the PERTE Chip program, part of the European Union’s NextGenerationEU recovery plan.
Intel Hawk Canyon Board (Source: BSC)
The long-standing partnership between BSC-CNS and Intel dates back to 2011, accelerating research and development in high-performance computing.
The BZL team will commence intensive “bring-up” activities and integrate Cinco Ranch into the center’s HPC software stack. This critical phase will ensure the chip’s performance and stability, a necessary precursor for its wider deployment.
Miquel Moreto, the hardware coordinator and project lead, expressed to EE Times the team’s readiness: “We are awaiting the arrival of the Cinco Ranch test chips to start testing them in our laboratory. In parallel, we are developing a multicore design with a more powerful VPU that we plan to fabricate in Intel 18A in 2026.”
Furthermore, Xavier Teruel, the software coordinator at the BZL, also shared his vision with EE Times: “In recent years, we have played a key role in building the full BSC software stack for RISC-V – a powerful suite that unlocks High Performance Computing across the entire architecture, from system-level software to optimised libraries and software frameworks.”
This ongoing work, supported by a diverse team of over 150 staff members, including specialists in architecture, microarchitecture, verification, and software development, is laying the foundations for Europe’s digital future, aiming to achieve the formidable zettascale barrier of 10²¹ per second, a thousand times faster than today’s most powerful supercomputers. The Cinco Ranch project is more than just a chip; it’s a testament to Europe’s ambition to lead in the global digital economy.
The milestone marks a crucial phase for the Barcelona Zettascale Laboratory (BZL) project, coordinated by the Barcelona Supercomputing Center (BSC), a pivotal initiative aimed at enhancing Europe’s technological sovereignty in high-performance computing (HPC) chip design and manufacturing.
The tape-out of these chips, following their fabrication with Intel Foundry Systems, positions the BSC closer to its goal of producing its own chips with European technology.
A new era in chip design
Cinco Ranch represents the fifth-generation and most advanced, power-efficient design in the Lagarto series of processors, an industrial-grade System-on-Chip (SoC) built on open-standard RISC-V architecture.The adoption of RISC-V is a strategic move, an open standard conceived in 2010 to reduce the growing complexity of microprocessor instruction sets and limit heavy dependence on chip producers in third countries. This approach mirrors the democratizing effect Linux had on software, now extended to hardware.
The processor integrates three distinct custom cores, each selected for specific computational needs. These include the Sargantana, an in-order single-issue RV64G core tailored with custom extensions for genomics sequence alignment; the Lagarto Ka, a dual-issue out-of-order core featuring a 16-lane Vitruvius RVV1.0 Vector Processing Unit (VPU); and the Lagarto Ox, a powerful 6-way out-of-order RV64GC core.
Additionally, Cinco Ranch boasts a three-level cache hierarchy, including a shared L3 cache based on OpenPiton, and support for modern interfaces like DDR5 and PCIe Gen3.
European autonomy in critical technologies
The overarching purpose of the Cinco Ranch project within the BZL is to develop sovereign supercomputing technologies in Europe, ultimately making the continent autonomous in these essential chips.These high-performance chips are not merely for supercomputers; their ultimate goal is to be deployed worldwide in diverse applications, such as autonomous cars and artificial intelligence (AI) devices.
The project aims for new levels of performance and energy efficiency, aligning with the BZL’s broader objectives of developing RISC-V general-purpose processors and VPU accelerators for HPC, with a strong emphasis on sustainability.
Prof. Mateo Valero (source: BSC)
Speaking to EE Times, Mateo Valero, the principal investigator of the BZL project and Director of the Barcelona Supercomputing Center, emphasizes this vision: “Cinco Ranch is a clear step forward in our goal to develop European technology for High Performance Computing.”
Valero has consistently advocated for Europe to end its dependence on chips, stating that without high-performance chips, there is “no artificial intelligence, no supercomputing.”
Strategic collaboration of BSC and Intel
The Cinco Ranch project is a direct outcome of the joint laboratory established between the Barcelona Supercomputing Center (BSC-CNS) and Intel.This pioneering collaboration, announced in June 2022, represents a significant investment of up to €400 million over 10 years, funded jointly by Intel and the Spanish Government through the PERTE Chip program, part of the European Union’s NextGenerationEU recovery plan.
The long-standing partnership between BSC-CNS and Intel dates back to 2011, accelerating research and development in high-performance computing.
Validation and future generations
With the physical chips in hand, the focus now shifts to comprehensive validation and testing.The BZL team will commence intensive “bring-up” activities and integrate Cinco Ranch into the center’s HPC software stack. This critical phase will ensure the chip’s performance and stability, a necessary precursor for its wider deployment.
Miquel Moreto, the hardware coordinator and project lead, expressed to EE Times the team’s readiness: “We are awaiting the arrival of the Cinco Ranch test chips to start testing them in our laboratory. In parallel, we are developing a multicore design with a more powerful VPU that we plan to fabricate in Intel 18A in 2026.”
Furthermore, Xavier Teruel, the software coordinator at the BZL, also shared his vision with EE Times: “In recent years, we have played a key role in building the full BSC software stack for RISC-V – a powerful suite that unlocks High Performance Computing across the entire architecture, from system-level software to optimised libraries and software frameworks.”
A stepping stone for European design and manufacturing
The successful fabrication of Cinco Ranch is not merely an end in itself; it consolidates the position of the BZL and its strategic partners at the forefront of semiconductor design and serves as a fundamental pillar for the BZL to build future generations of chips.This ongoing work, supported by a diverse team of over 150 staff members, including specialists in architecture, microarchitecture, verification, and software development, is laying the foundations for Europe’s digital future, aiming to achieve the formidable zettascale barrier of 10²¹ per second, a thousand times faster than today’s most powerful supercomputers. The Cinco Ranch project is more than just a chip; it’s a testament to Europe’s ambition to lead in the global digital economy.
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