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Is this memory/compute structure a game changer?

Arthur Hanson

Well-known member
Any thoughts or comments on this appreciated, Thanks.

A chip with 'thousands' of cores could change the way servers are designed - bringing compute nearer to RAM thanks to CXL is a lightbulb moment

 A chip with 'thousands' of cores could change the way servers are designed - bringing compute nearer to RAM thanks to CXL is a lightbulb moment

A chip with 'thousands' of cores could change the way servers are designed - bringing compute nearer to RAM thanks to CXL is a lightbulb moment© XCENA
  • - XCENA introduced MX1 computational memory with thousands of RISC-V cores at FMS 2025
  • - MX1 offers near-data processing reducing CPU-memory overhead and enabling petabyte-scale SSD backed expansion
  • - Product roadmap includes MX1P this year and MX1S in 2026 supporting CXL 3.2
At the recent FMS 2025 event (formerly Flash Memory Summit but now called Future of Memory and Storage to better suit its expanded focus), South Korean startup XCENA took the wraps off its first product, MX1 Computational Memory.

 
The notion of computational memory is decades old. Using it requires that you modify your applications, with either libraries, recompilation, or, more likely, a redesign. I see a lot of hype in that announcement. Take the notion of computational memory, and mix it with two semi-hot new(er) technologies, namely RISC-V and CXL, and you get new excitement, sort of. At least for people who don't understand how tricky it is to get the benefit of computational memory without specifically designed applications. And even then, in the past it has merely been a benchmark wonder. I can think of a lot of ways to make computational memory work, and even show results, but I can't think of a way to make it have broad-based applications.
 
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