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  1. F

    Build China’s ASML

    Well, this may not age so well, as there is plenty of blur that does not come from ASML's machine, namely, the resist (from the electrons, and in a lot of cases, acids).
  2. F

    Build China’s ASML

    Also, the components of ASML's EUV systems are individually expensive and many would only be used just for those kinds of systems. Even something that may sound trivial like precision maglev vacuum stages. Hydrogen-proofing makes it sound less trivial.
  3. F

    Elon Musk kills résumés for chip hires and wants these 3 bullet points

    Well, "a résumé is still required to apply for most other jobs at Tesla in the U.S.—with some positions even calling for an “evidence of excellence” statement." https://fortune.com/2026/02/20/how-does-elon-musk-hire-dojo3-chip-team-no-resumes-3-bullet-points/
  4. F

    Build China’s ASML

    The article briefly mentioned that Shanghai Microelectronics Equipment (Group) Co., Ltd.'s 28nm lithography machine (ArF, Immersion) "has entered the process testing stage." So how well they will do there is still a question.
  5. F

    Build China’s ASML

    Originally, I had posted their development goals directly from the auto-translation, but the translation contained misleading errors. Focusing on the process development, their suggested goals for the 15th Five-Year Plan (which ends 2030) are: 1. A controllable and self-reliant 28nm ecosystem...
  6. F

    Intel’s EMIB Challenges TSMC’s CoWoS as America’s Answer to the AI Packaging Bottleneck

    Muhammad Zuhair •Mar 6, 2026 at 01:15pm EST Intel's packaging services are being considered a viable alternative to TSMC's CoWoS, as supply constraints are forcing US fabless customers to seek other options. Intel's EMIB Packaging Orders Could Reach 'Billions in Revenue' Moving Into H2 2026; a...
  7. F

    Build China’s ASML

    For them, Moore's Law ended at 28nm: This news is interesting: "Shanghai Microelectronics Equipment (Group) Co., Ltd.'s 28nm lithography machine (ArF, Immersion) has entered the process testing stage." In contrast, the EUV status report seems to highlight a national-level challenge: "Reports...
  8. F

    Build China’s ASML

    NIL is said to target < 10 nm features. The biggest issue is the mask or template, it has tighter defect, placement, roughness, and CD specs than scanner masks, and it also has limited lifetime. The authors did not understand that the SADP is for the template not the wafer. Throughput is also...
  9. F

    Build China’s ASML

    China has been doing EUV research and following ongoing EUV developments, although I don't know if they have been attending the SPIE Advanced Lithography Conferences in person, or if they're banned. But they should know about stochastics. And that TSMC uses multipatterning. (They should...
  10. F

    Build China’s ASML

  11. F

    Build China’s ASML

    Well, taking SMEE as a reference, they're not learning or deploying fast enough.
  12. F

    Intel has manufacturing capacity issues. They may take years to fix.

    The company redirected some of its chips production to meet surging server demand, but analysts say it’s missing out on emerging AI-driven trends. Published March 3, 2026 Nathan Owens Technology companies are clamoring for processors, especially hyperscalers looking to power their data...
  13. F

    Exclusive: ASML plots future of chipmaking tools for AI beyond EUV

    Summary: - ASML plans to expand into advanced packaging for AI chips - Company to use AI to enhance tool performance and production speed - ASML explores larger chip sizes and new scanner systems SAN JOSE, California, March 2 (Reuters) - ASML Holding (ASML.AS), opens new tab has ambitious plans...
  14. F

    Chinese DDR5 RAM: Is This the Solution to Crazy Memory Prices?

    CXMT DDR4 had been at 1x, DDR5 started at 1z. 1c (gamma) is starting to trickle out, but it's still a heavy multipatterning burden (word line pitch < 33 nm).
  15. F

    Intel Board Chair Frank D. Yeary to Retire Following Annual Meeting; Dr. Craig H. Barratt Elected as Chair

    The name really needs a double-take.
  16. F

    Panther Lake design rules revealed, no HD cells

  17. F

    This Innovation Could Make the Perfect Silicon Chip—and End Moore’s Law

    It's slow, like epitaxy, to keep the crystalline order.
  18. F

    This Innovation Could Make the Perfect Silicon Chip—and End Moore’s Law

    I don't know why they couldn't have used one of many available from ASML:
  19. F

    This Innovation Could Make the Perfect Silicon Chip—and End Moore’s Law

    A/MLD is a slow, i.e., expensive, way of depositing photoresist, compared to standard spin-coat.
  20. F

    This Innovation Could Make the Perfect Silicon Chip—and End Moore’s Law

    I can't believe this figure is from TSMC.
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