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During those years, TSMC and Intel were not direct competitors, since Intel did not have IFS and Intel also made its own processors (no chiplets then). From 7nm onwards, they were closer to competing since AMD became a TSMC customer, but by then, Intel and TSMC were already on different paths...
Why's everyone bringing this to country level? It's IP issue between company and ex-employee, could happen anywhere, and internationally recognized everywhere. If TSMC were wrong, WJL could counter-sue.
Chinese memory chip manufacturer Changxin Memory Technologies (CXMT) officially released its latest generation of DDR5 and LPDDR5X products. In response, South Korean media outlet Business Korea pointed out that the technological gap between China and South Korea in the memory chip field is...
Pyeongtaek and Hwaseong are also sites for Samsung Foundry. I had understood DRAM to share with the EUV lines there? They could have expanded DRAM and foundry in that case, if not just DRAM alone.
I don't understand why there would be a good reason to cut down the NAND at the same time...
Hyperscalers and server manufacturers are ordering too many memory components for their AI infrastructures - more than the market can produce. As a result, prices are rocketing, and a shortage could last until 2027
by Yann Serra, LeMagIT
Published: 26 Nov 2025 11:04
Chip manufacturers are...
On Wednesday afternoon investigators, acting on a search warrant, searched two of Lo's homes, seizing computers, USB drives and other evidence, prosecutors said.
A court also approved a petition to seize his shares and real estate, the statement added...
Intel lays off 669 more Oregon workers as local headcount dwindles
Updated: Nov. 13, 2025, 5:07 p.m.
|Published: Nov. 13, 2025, 4:08 p.m.
By Mike Rogoway | The Oregonian/OregonLive
Intel laid off another 669 Oregon workers Thursday on top of 2,400 Washington County jobs the chipmaker cut in...
Such a big workload difference, if true, could correlate to the amount of business the respective companies are handling. Or else, one company is simply slacking 😏.
How could this happen without raising suspicions? So actually, the mention of the boxes kind of surprised me. If true, some staff at TSMC would also be in trouble for it. I am surprised that the boxes were not or would not be inspected. The procedures must be changed now for sure. But if there...
"Compared with TSMC, Intel is reportedly offering salaries that are 20–30% higher while providing a workload that is roughly half as heavy, successfully attracting some U.S. engineers to switch over."
The mention of workload difference caught my eye. If it's true, it says more about the...
Former TSMC senior vice president Wei-Jen Lo’s move to Intel—along with allegations that he took sub-2nm documents—has now sparked reports that Intel is also trying to recruit TSMC engineers in Arizona. According to Liberty Times, sources say Intel has recently been aggressively poaching...
The transistor density uses the standard cell height. For a 6-track cell, it means the cell height is 6 track metal pitches, although the rails occur after every four tracks. The rails would be 3 times the signal track metal width.
If the gate pitch is 54 nm, at 125 MTr/mm2, the cell height...
This is the X post I referred to:
定焦数码 mentioned it's between TSMC N6 and Samsung 5LPE. 5LPE pitches are given here: https://fuse.wikichip.org/news/2823/samsung-5-nm-and-4-nm-update/. 54 nm gate pitch and 36 nm M2 track pitch, giving 126 MTr/mm2.
The 125 MTr/mm2 came from a Weibo post on March 24 this year by 定焦数码, later reposted on X the same day by @Jukanlosreve.
If the SMIC N+3 125 MTr/mm2 density is real, then we can project some pitches, using calibration from https://www.angstronomics.com/p/the-truth-of-tsmc-5nm.
If the gate...
