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TSMC ahead of Samsung for the foreseeable future

prime007

Member
Got an idea to do this from Scotten Jones' excellent article here...

There was a recent article on Anandtech where the author compared ARM chips manufactured by TSMC and Samsung. In it, he benchmarked the Snapdragon 865 (TSMC N7P) vs Snapdragon 888 (Samsung 5LPE). His working theory is that since the Cortex-A55 cores inside both the Snapdragon 865 and the new Snapdragon 888 feature the same IP cores, the same 1.8GHz frequency, and the same amount of L2 cache...then their only real difference are their process nodes. He found that TSMC N7P and Samsung 5LPE were roughly equivalent (Samsung's 5LPE was slightly more efficient) to one another.

IF that is true, then we can try drawing out how Samsung 3GAE compares to TSMC 5 nm technology. Given the information from Anandtech, it's stated that Samsung expects 3GAE to be 35% faster than 7LPP...which means that it should be approximately 22.7% faster than Samsung 5LPE. TSMC states that their "N5P technology provides roughly 20% speed improvement or 40% reduction in power consumption". In terms of performance, it would seem to appear that TSMC N5P and Samsung 3GAE to be roughly equivalent (although Samsung's GAE would be more power efficient).

Come the release of TSMC N3 (H2 2022), both the power and (roughly 13+% faster) performance crown will again belong to TSMC. Statistics for TSMC's nodes are found here.

Given TSMC's record of execution & their recent affirmation of good progress on N3 in their earnings call, there seems little doubt that TSMC will deliver N3 on time. The bigger question is IF Samsung can deliver their new 3GAE on-time with good yields.

Added at 11:08 PM on 2/11/2021: Be sure also to read Daniel's excellent article on if Samsung Foundry can compete against TSMC here. It seems my post is just agreeing to both Daniel's & Scotten's articles.
 
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Fred Chen

Moderator
Qualcomm X62 and X65 are on 4nm, supposedly Samsung's. Just announced a few days ago.


Snapdragon also features the world’s first 5G solutions featuring a 4nm baseband chip, built to deliver outstanding power efficiency with a tiny footprint.
 
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prime007

Member
Interesting....I had thought (via Digitimes) that Samsung was going straight to 3nm and attributed this product to TSMC.
 

Fred Chen

Moderator
Interesting....I had thought (via Digitimes) that Samsung was going straight to 3nm and attributed this product to TSMC.

Samsung 4nm is indeed a bit of a surprise, as it was not highlighted that much for 2021 focus, but TSMC 4nm is projected toward the end of the year.
 

Daniel Nenni

Admin
Staff member
Process update from Scott Jones:


Definitely worth a read.
 

prime007

Member
Scotten's EN (equivalent node) idea is interesting and would add a lot of clarity to each of the company's process technology. I would think it would be in BOTH Intel's and TSMC's interests to have some type of equivalence rating when marketing their future process nodes to prospective clients/general public. For example, TSMC's current 5nm could have an alias of I7S3GAE which could roughly translate to (I)ntel's 7nm/(S)amsung's 3GAE process nodes.
 

Fred Chen

Moderator
In terms of comparing stages of EUV development, I generally look at minimum metal pitch (MMP). From what I've read, TSMC 5nm and Samsung 4nm are both 28 nm MMP, so in that aspect, they are equivalent.

Postscript details - I thought I would add the sources I read, for the curious:

Samsung 4nm:

https://community.cadence.com/caden...s/posts/samsung-foundry-forum-10-8-7-5-4-3gaa
"4LPE is further scaling, with extreme scaling of MOL and BEOL. There is flexible contact placement (phase 2), additional cell area shrinkg of 10% enableing M1 27nm/40nm."

https://fuse.wikichip.org/news/2823/samsung-5-nm-and-4-nm-update/
"4LPE is similar to 5LPE but shrinks the M1 pitch from 40 nm to 28 nm and the M3 from 36 nm to 32 nm."

https://semiwiki.com/semiconductor-manufacturers/samsung-foundry/259664-samsung-foundry-update-2019/
"4nm adds to the EUV layer process integration – e.g., 4LPE offers 28nm M1 pitch with a double-EUV exposure"

TSMC 5nm:

IEDM 2020 paper 9.2 "A Reliability Enhanced 5nm CMOS Technology Featuring 5th Generation FinFET with Fully-Developed EUV and High Mobility Channel for Mobile SoC and High Performance Computing Application," by J. C. Liu et al., Figure 2a:

IEDM 2020 paper 9.2 Figure 2a.png

7nm MMP was 40 nm, e.g., see https://fuse.wikichip.org/news/2408...ells-2nd-gen-7nm-and-the-snapdragon-855-dtco/.
 
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