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Intel secures high-NA EUV kits over rivals

Daniel Nenni

Admin
Staff member
HNA-EUV.jpg

US chip giant secures all initial stock from ASML / Samsung and SK Hynix to get units next year

Intel has secured the majority of high-NA extreme ultraviolet (EUV) equipment that ASML is manufacturing up to the first half of next year, TheElec has learned,

The Dutch fab equipment maker is manufacturing five units of the kit this year, which will all go to the US chipmaker, sources said.

As ASML’s production capacity for high-NA EUV equipment is around five to six units per year, this means Intel is getting all the initial stock, they said.

Intel’s rivals Samsung and SK Hynix are expected to get their hands on the kit sometime during the second half of next year.

The US chipmaker preemptive purchased the equipment as it announced its re-entry into the chip foundry, or contract chip production, business, they also said.

ASML’s high-NA EUV equipment is a must for chipmakers to make 2-nanometer (nm) process node chips. Each unit costs over 500 billion won.

NA stands for numerical aperture and indicates the ability of an optical system to collect and focus light. The higher the numerical value, the better it is at collecting light, High-NA EUV equipment has their NA increased to 0.55 from 0.33. This basically means the equipment can draw finer circuit patterns.

Intel is adopting high-NA EUV faster than its rivals to win over customers. The company reentered the foundry market in 2021 but last year the business lost US$7 billion.

 
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US chip giant secures all initial stock from ASML / Samsung and SK Hynix to get units next year

Intel has secured the majority of high-NA extreme ultraviolet (EUV) equipment that ASML is manufacturing up to the first half of next year, TheElec has learned,

The Dutch fab equipment maker is manufacturing five units of the kit this year, which will all go to the US chipmaker, sources said.

As ASML’s production capacity for high-NA EUV equipment is around five to six units per year, this means Intel is getting all the initial stock, they said.

Intel’s rivals Samsung and SK Hynix are expected to get their hands on the kit sometime during the second half of next year.

The US chipmaker preemptive purchased the equipment as it announced its re-entry into the chip foundry, or contract chip production, business, they also said.

ASML’s high-NA EUV equipment is a must for chipmakers to make 2-nanometer (nm) process node chips. Each unit costs over 500 billion won.

NA stands for numerical aperture and indicates the ability of an optical system to collect and focus light. The higher the numerical value, the better it is at collecting light, High-NA EUV equipment has their NA increased to 0.55 from 0.33. This basically means the equipment can draw finer circuit patterns.

Intel is adopting high-NA EUV faster than its rivals to win over customers. The company reentered the foundry market in 2021 but last year the business lost US$7 billion.


"Intel’s rivals Samsung and SK Hynix are expected to get their hands on the kit sometime during the second half of next year."

Is SK Hynix an Intel's rival? Also, it's very strange that the author didn't mention TSMC once. :)
 
Another quote "ASML’s high-NA EUV equipment is a must for chipmakers to make 2-nanometer (nm) process node chips." intel uses it in 20A/18A? No. Samsung use it in SF2? No. tsmc use it in N2 or A16? No. This report is very un-professional.
 
NA stands for numerical aperture and indicates the ability of an optical system to collect and focus light. The higher the numerical value, the better it is at collecting light, High-NA EUV equipment has their NA increased to 0.55 from 0.33. This basically means the equipment can draw finer circuit patterns.
Not surprisingly, this kind of article got the technical statements all wrong. In fact, collected light is lost through the obscuration (hole in mirror). The NA is about focusing light in space but in an EUV resist, there are electrons spread, so the connection between NA and resolution is pre-EUV.

See: https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&cad=rja&uact=8&ved=2ahUKEwiUofOcxouGAxUllK8BHXH3DPoQFnoECBgQAQ&url=https://asset-downloads.zeiss.com/catalogs/download/smt/2f5250f6-00a1-4d8e-a468-6bf812335b10/high-na-euv-optics_preparing-lithography-for-the-next-big-step.pdf&usg=AOvVaw13dxQyIvnejcTuTAW5zc45&opi=89978449
 
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Does TSMC really not have a machine already or on the way? Perhaps one produced in 2023?

I get the lower risk profile but it seems prudent for them to get one machine early to study the tech.
 
I just don't think it is true. No way intel has bought every single unit until 2H25. Considering ASML has shipped their second customer unit, intel hasn't claimed they got it (which I assume they would claim if they did) and TSMC gave a wink and double eyebrow raise when asked if it was them. I see no actual evidence that this "story" is true. Now maybe of say the first 10 units, maybe intel is getting like 4 or 5 of those, but that is very different than getting all units for the better part of two years. Something else fishy about this story is that it makes no sense for SK to be lining up so early. Currently EUV has limited applications in DRAM (low single digit layers the last I've seen but maybe 1-beta or 1-gamma changes things). If regular EUV isn't always "better" than SAPQ for many DRAM applications, then why would SK be one of the first folks to want to jump to high-NA (doubly so with 3D-DRAM being right around the corner).
 
I just don't think it is true. No way intel has bought every single unit until 2H25. Considering ASML has shipped their second customer unit, intel hasn't claimed they got it (which I assume they would claim if they did) and TSMC gave a wink and double eyebrow raise when asked if it was them. I see no actual evidence that this "story" is true. Now maybe of say the first 10 units, maybe intel is getting like 4 or 5 of those, but that is very different than getting all units for the better part of two years. Something else fishy about this story is that it makes no sense for SK to be lining up so early. Currently EUV has limited applications in DRAM (low single digit layers the last I've seen but maybe 1-beta or 1-gamma changes things). If regular EUV isn't always "better" than SAPQ for many DRAM applications, then why would SK be one of the first folks to want to jump to high-NA (doubly so with 3D-DRAM being right around the corner).
It's a very strange situation. I believe ASML and Intel still have a lot things to iron out for the first High NA EUV at Intel Oregon. Does that make sense to install five more units of High NA EUV so early? Will it be risky and costly if it turns out modifications are needed after the installation?

Unless ASML and Intel are very confident that they will sort out everything by the end of 2024?
 
There is something called ROI! How many EUV does TSMC have and how much have they learned running and improving them over millions of wafers. Makes sense to continue to leverage them instead of jumping whole hog into High NA.

Intel is just getting going and doesn’t have a lot of EUVs. They totally missed the boat on converting and Pat has made it a honor and ego thing to be first to High NA. I don’t think he cares if it is ready, cost effective or what. Given the FUAR Intel made on SAQP and missing EUV Pat has doubled down on HighNA and whether right or not nobody at Intel probably has the courage to tell Pat of it is wrong.

TSMC is far more pragmatic, like when they adopted it at N7, baby steps and go methodically. After all it is why it all comes from rogue province of China these days.
 
Given the FUAR Intel made on SAQP
Is Intel 7 still running with SAQP? I read that Intel 4 also continued use of SAPQ for tightest pitch.
and missing EUV Pat has doubled down on HighNA
Interesting also that they didn't buy many more of the NXE systems instead, perhaps they couldn't and the first few EXE shipments was the result?
 
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I just don't think it is true. No way intel has bought every single unit until 2H25. Considering ASML has shipped their second customer unit, intel hasn't claimed they got it (which I assume they would claim if they did) and TSMC gave a wink and double eyebrow raise when asked if it was them. I see no actual evidence that this "story" is true. Now maybe of say the first 10 units, maybe intel is getting like 4 or 5 of those, but that is very different than getting all units for the better part of two years. Something else fishy about this story is that it makes no sense for SK to be lining up so early. Currently EUV has limited applications in DRAM (low single digit layers the last I've seen but maybe 1-beta or 1-gamma changes things). If regular EUV isn't always "better" than SAPQ for many DRAM applications, then why would SK be one of the first folks to want to jump to high-NA (doubly so with 3D-DRAM being right around the corner).
TheElec is sometimes enthusiastically pro-Korean, so in mentioning only Samsung and SKHynix, author didn't realize SKHynix was not foundry. 10nm (1d) will have unavoidable substantial multipatterning, so 3D-DRAM is actively being developed today. I have already heard quite a few proposals at IMW this week.
 
There is something called ROI! How many EUV does TSMC have and how much have they learned running and improving them over millions of wafers. Makes sense to continue to leverage them instead of jumping whole hog into High NA.

TSMC has more than half of the current EUV systems in service. This was stated at the TSMC Symposium.

HNA-EUV is all about lowering production cost. At some point in time Intel will make cheaper wafers with HNA-EUV and that is a very important thing for Intel Foundry. It is hard for me to believe that TSMC and Samsung don't have plans for HNA-EUV R&D this year.

Kevin Zahng should be more careful with his words. Saying HNA-EUV is too expensive is shortsighted and pissing off ASML is not wise.
 
Fred of all people you know the physics of how much highNA gives. One could argue how many NXE relates to final 4/3 production need. Clearly IFS volumes will never catch TSMC so economics will be a key factor in tool choice as well as capability.

Pat has publicly made so much noise about HighNA and the videos flowering around is like a porn star showing off his big tool
Is Intel 7 still running with SAQP? I read that Intel 4 also continued use of SAPQ for tightest pitch.

Interesting also that they didn't buy many more of the NXE systems instead, perhaps they couldn't and the first few EXE shipments was the result?
 
TSMC has more than half of the current EUV systems in service. This was stated at the TSMC Symposium.

HNA-EUV is all about lowering production cost. At some point in time Intel will make cheaper wafers with HNA-EUV and that is a very important thing for Intel Foundry. It is hard for me to believe that TSMC and Samsung don't have plans for HNA-EUV R&D this year.

Kevin Zahng should be more careful with his words. Saying HNA-EUV is too expensive is shortsighted and pissing off ASML is not wise.
Daniel: Here is the number (56%) from tsmc press release. We can read tsmc got ~20 more EUV tools in 2023 but only produced ~1% more wafer moves. What a tough year in 2023 for 5nm and 3nm.
1715724762713.png
 
It's a good time to revisit @pgerven interview with ASML CTO Martin van den Brink in 2022.

 
reminder: Intel need hype and PR to gain respect and show leadership in the future. TSMC is just making wafers and tons of money. Those two companies will behave very differently for the next 5 years. Having videos on social media of the HIgh NA unboxing was hilarious.
 
reminder: Intel need hype and PR to gain respect and show leadership in the future. TSMC is just making wafers and tons of money. Those two companies will behave very differently for the next 5 years. Having videos on social media of the HIgh NA unboxing was hilarious.

TSMC is making a ton of money, and Intel needs to make a lot of noise to get attention.. but the high NA unboxing at least shows they’re willing to take risks and push for the future. It’s also a rallying cry for the engineers.

I’ve also seen a few comments here on Semiwiki that even Intel 3 may have higher transistor performance than TSMC N3, and 18A will certainly beat TSMC N2 in some metrics. Remember there’s two races here: 1. The Lithography process itself, and 2. Volume/Capacity in the Foundry. Intel needs to win #1 first and it looks like they have a plan that is starting to bear fruit. We’ll know for sure in the next 9 months if we see Intel 3 and 20A launch in that time. #2 is going to be a very long game.
 
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