BTC mining chips .
TSMC N3P and N2.
Can Intel recover even part of their past dominance?
- Thread starter Arthur Hanson
- Start date
TSMC N3P and N2.
interesting. i thought bit mining is mainly performance driven. Lowering vdd to 0.25v using existing leading edge means they are all doing sub-threhold computing?
N2 elvt threhold is around 0.1v.
The real trick is leakage.
Most btc mining chips are using dynamic logic which are almost impossible for elvt.
This is also why the latest btc miner requires an ambient temperature below 45 °C.
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thanks great info. For design point, BTC is not using higher Vdd due to overall power constraints? what was constraining it, DC cooling?
Electricity accounts 80% of BTC mining. You want to try everything to lower the power consumption
Beyond a given point, lowering voltage further increases power consumption per operation.
If you look at power-delay product, this tells you the energy needed to do something, Dynamic power (CV^2) drops with lower voltages (leakage less so) but so does clock speed, more rapidly as you get closer to the threshold voltages. For a given gate type (e.g. ELVT, ULVT, LVT, SVT) and clock speed (and activity percentage) there is a supply voltage where PDP reaches a minimum, and this where the power consumption is also a minimum -- as VDD drops you have to run slower but with more parallel circuits, which works for many things but not all. And if you're really bothered about power efficiency, you also need to vary VDD with process corner and temperature, and also circuit activity and clock speed.
For the circuits we've looked at in N3 and N2 which are relatively high activity (e.g. DSP, FEC...) the lowest PDP is usually with ELVT, but has never been as low as 0.225V -- for lower activity circuits where ELVT leakage is too high compared to dynamic power, ULVT can be better. But there's no single "best" answer (transistor type, voltage, frequency), it all depends on what the circuits are doing... ;-)
If you look at power-delay product, this tells you the energy needed to do something, Dynamic power (CV^2) drops with lower voltages (leakage less so) but so does clock speed, more rapidly as you get closer to the threshold voltages. For a given gate type (e.g. ELVT, ULVT, LVT, SVT) and clock speed (and activity percentage) there is a supply voltage where PDP reaches a minimum, and this where the power consumption is also a minimum -- as VDD drops you have to run slower but with more parallel circuits, which works for many things but not all. And if you're really bothered about power efficiency, you also need to vary VDD with process corner and temperature, and also circuit activity and clock speed.
For the circuits we've looked at in N3 and N2 which are relatively high activity (e.g. DSP, FEC...) the lowest PDP is usually with ELVT, but has never been as low as 0.225V -- for lower activity circuits where ELVT leakage is too high compared to dynamic power, ULVT can be better. But there's no single "best" answer (transistor type, voltage, frequency), it all depends on what the circuits are doing... ;-)
‘ Nvidia is the new Intel’. Is that a positive or negative remark?
siliconbruh999
Well-known member
maybe half of it
MKWVentures
Moderator
Interesting. So then TSMC Revenue from Broadcom should be dropping and Google Increasing, correct? I have worked on partnerships like this and who recognizes revenue and when and who holds inventory is always part of the deal.
Given the way the AI-driven chip market is going through the roof, I suspect TSMC's revenue from Broadcom revenue is increasing but their revenue from Google is increasing even faster... ;-)
siliconbruh999
Well-known member
Tensor is at TSMC as well alongside the custom Chip Google Commissioned Intel(missed Opportunity).
MKWVentures
Moderator
Help me on this google commissioned Chip? whats the story?
siliconbruh999
Well-known member
This is from Hot Chips 2025 Google is the main customer for this one
It's on N5
Broadcom announced $73B in TPU/XPU AI acceleration revenue over the next 6 quarters. It is my understanding that Broadcom delivers data center TPUs to Google.
MKWVentures
Moderator
That was my understanding in the past. Broadcom revenue to TSMC was from Google orders. Google may consign the HBM. But it sounds like Google is directly working with TSMC?
So Intel is still doing design for Google on TSMC or Google skipped Intel?
Holding inventory is a big advantage of working with an ASIC company. ASIC companies also manage packaging, do burn-in, test, etc... They are experts and having this type of expertise in-house is not necessary for Google etc... especially when they do not sell chips.
If you believe Mark Hippen and his data (link below) -- it looks like Broadcom is getting the revenue from Google TPU (data center) AI processors. (Google doesn't even show up in his data.)
https://seekingalpha.com/article/4852911-how-nvidia-grew-data-center-market-share-in-q3
Here is the story:
HP had a big R&D group which spun out Agilent Technologies which became Avago. This was Hock Tan's doing. Avago had an IP group that had the lead in SerDes and other IP so based on that IP Avago did custom ASICs. This was back when IBM, LSI Logic, VLSI Technologies, NEC, and other Japanese semiconductor companies owned the ASIC market. IBM really was a force of nature back then. Avago bought LSI Logic, GlobalFoundries bought IBM Semiconductor and there was other consolidation. Avago became Broadcom, again Hock Tan's doing, and the ASIC business grew. Last I heard it was $30B+ of BRCM revenue.
Avago did Google's first TPUs but Google built up internal teams so they do most of their own design now. Avago still handles some of the backend stuff. I worked for an EDA company who was inside Google for 16nm, 7nm, 5nm, and 3nm. The TSMC N2 TPU is now in process.. They wrote some very big checks and are a coveted EDA/IP customer. Broadcom, on the other hand, has always been cheap on EDA tools. I worked on a couple of projects with them back in the 1990s and it was rough. From what I hear Hock Tan has continued that tradition of sharp penciling.
siliconbruh999
Well-known member
It is Intel designing for Google on N5 also some Chinese customers it's a NEX Product not sure though.