The GDP1BFLM package contains a single 2 Gb CXMT G3 DDR3L SDRAM die. The DDR3L SDRAM (HUANGSHAN4G) die measures 6.26 mm × 6.31 mm (39.50 mm2) as measured from the die seals or 6.30 mm ×6.36 mm (40.07 mm2) for the full die. The die was manufactured using a DRAM CMOS process incorporating four back-end of line (BEOL) interconnect layers, one tungsten (W), two copper (Cu), one aluminum (Al), with bit line (BL) under capacitors and a buried word line (WL) forming the gate of the buried cell array transistor (BCAT).
Only 0.05 Gb/mm2?!