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From closing points:
Overall, while the A15 isn’t the brute force iteration we’ve become used to from Apple in recent years, it very much comes with substantial generational gains that allow it to be a notably better SoC than the A14. In the end, it seems like Apple’s SoC team has executed well after all.
Dylan got roasted on the /r/hardware Reddit comment thread for this Anandtech article for claiming "no CPU gains," and rightfully so. Most people probably didn't read beyond the headline of his article so they didn't understand the context which was that the IPC gains are minimal due to a delay of the next microarchitecture. He offered some good speculative insight, but should have done a better job of differentiating between IPC and performance-per-watt, the latter of which can be improved even reusing the same microarchitecture.
It seems here that the performance uplift was from a combination of doubling the cache and raising clock speeds. While the power efficiency improvement is primarily from a maturing process node. i.e. N5P, as Paul2 said.
Overall, a great improvement considering the talent loss impacting Apple's roadmap, and I look forward to seeing next year's A16 on a further improved 4nm node and the new architecture! Dylan's chart showed that the transistor utilization rate (effective vs theoretical density) dropped from the low 90% range on the previous three nodes down to ~78% on 5nm. Seems like the A16 will likely focus on closing this gap to improve performance-per-area.
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