Description This virtual session is your opportunity to explore Grand Canyon University and TSMC’s one-semester Manufacturing Specialist Intensive, industry funded pathway. Join to find out how you can start building …
About As global connectivity demands surge, network infrastructure hardware is under unprecedented pressure to deliver higher performance, lower latency, and greater energy efficiency, while remaining cost-effective and reliable. This challenge …
Continue reading "Webinar: Intelligent Networks: Power, Reliability & Maintenance in Telecom"
Wednesday, March 11 - 8:00 AM Pacific Design and verification teams consistently tell us that compute subsystems require software bring up much earlier than ever before. They need UEFI and …
Continue reading "Webinar: Shift-Left Compute Subsystem RTL Sign-Off with Software Aware VIP"
As AI workloads scale into the thousands of accelerators and hundreds of terabytes of distributed memory, traditional interconnects cannot deliver the deterministic latency, bandwidth efficiency, or memory semantic operations required …
Continue reading "Webinar: Understanding UALink Architecture: A Protocol Deep Dive"
Ensure fabrication success with proven HDI design techniques and real-world tools. Overview: As AI accelerators and edge compute modules push PCB densities to their physical limits, HDI design has become …
Continue reading "Webinar: HDI Design Workflow: From Decisions to Fabrication"
In this webinar, Marvell will present how its team accelerates passive interposer routing for advanced 2.5D/3.5D multi die designs by bringing early, physics based signal integrity feedback into each routing …
Physical AI is increasingly popular in applications requiring real-time decision making and autonomous operation. Different from NPUs for cloud platforms, Physical AI processors can be made application-specific. By jointly tuning …
Continue reading "Webinar: Application-Specific Processors (ASIPs) for Physical AI"
As semiconductors continue to scale, designers are turning to 3DIC architectures to meet increasing demands for performance, energy efficiency, and functional density in data centers and edge AI applications. However, …
Continue reading "Webinar: Powering 3D Multi-Die Designs with RedHawk-SC Electrothermal"
Abstract Dive into the future of Bluetooth audio with Ceva and Dolphin Semiconductor’s breakthrough 12nm Smart Edge AIoT SoC solution. This webinar shows how advanced wireless connectivity, integrated AI processing, …
As power integrity challenges increase with advanced nodes and multi-die architectures, EMIR analysis must evolve beyond traditional signoff. In this Synopsys webinar, we will show how RedHawk-SC is expanding its capabilities …
Continue reading "Webinar: RedHawk-SC: From EMIR Signoff to IR-Aware Design Closure"
Data rates have doubled, but validation methods have not kept pace. As PCIe, DDR, and multi-terabit optical interconnects evolve, engineers are encountering signal integrity challenges much earlier in the design …
Continue reading "Webinar: How Data Rates Doubled, and Where Validation Reaches Its Limit"
In this webinar, Intel will present how EMIB-T (Embedded Multi-die Interconnect Bridge with TSVs) enables compact, cost-effective multi‑die design while sustaining the bandwidth and power efficiency required for AI and datacenter designs. …
As systems move into higher frequencies and wider bandwidths, small measurement errors can lead to costly design decisions. Engineers working in wireless, radar, satellite, and optical domains must now validate …
Featured Speaker: Victoria Kolesov, Principal Engineer, Intel In this Synopsys webinar, Intel will present how its disaggregated designs across client and server platforms have driven the evolution of robust 3D …
