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Discover how Siemens’ open, modular framework enables scalable, standardized automation for battery cell production Join us for an in-depth webinar exploring the transformative potential of Siemens' Battery Automation Framework — a cutting-edge, open, and modular toolkit designed specifically for the automation of battery production processes. This webinar will provide battery cell manufacturers with crucial insights …
SICAM EPMS the future proven Solution for Power Management in Data Center This webinar is designed for technical engineers tasked with defining and implementing solutions for power management, power monitoring, and power quality within data center power supply systems. Explore the world of Electrical Power Management Systems (EPMS) for data centers. Learn about standardized, modular …
As the demand for Machine Learning increases, the need for custom hardware acceleration explodes. Hardware optimized for Performance, Power, and Area are incredibly important to stay competitive. This webinar will cover High-Level Synthesis and its benefits in quickly and accurately producing hardware accelerators. We will cover the step-by-step design and verification of the Wake Word …
Ethernet speeds are accelerating fast and AI, Cloud, and HPC workloads are driving demand that doubles every year. With 800Gbps ports in production and 1.6Tbps Ethernet around the corner, the need for robust pre-silicon verification has never been greater. Join this webinar to see how the Veloce™ hardware-assisted verification platform extends support for 1.6Tbps Ethernet …
The increasing demand for accelerated computing solutions calls for an agile hardware design methodology to be able to keep up with fast evolving landscape of algorithms. Traditional hardware design methodology has long development cycles involving defining architecture, doing microarchitecture development using RTL, and performing verification. An agile workflow requires being able to iterate through the …
As digital chip design complexity grows, engineering teams face increasing pressure to meet aggressive PPA targets on tight schedules. To overcome this challenge, the EDA industry requires a revolutionary shift towards AI. Siemens EDA is leading this transformation by implementing a comprehensive strategy that combines machine learning, reinforcement learning, generative, and agentic AI across the …
High-Level Synthesis (HLS) is design flow in which design intent is described at a higher level of abstraction such as SystemC/C++/Matlab/etc. HLS tools are expected to synthesize this code to RTL which can be input to the traditional RTL downstream flow (RTL/GDS). Formal check tools are difficult to be analyzed on generated RTL (as the …
Traditional RTL low power design techniques such as sequential clock gating are widely deployed across the industry. Yet, even after multiple RTL revisions, residual power inefficiencies often remain undetected until silicon, resulting in missed optimization opportunities. This seminar presents a refined approach to conventional methodologies: a reporting and opportunity identification layer that sits atop clock …
Join us for this essential webinar where we'll explore how Questa One Sim empowers VHDL designers to dramatically enhance their debugging productivity. We'll move beyond basic simulation viewing and dive into advanced features designed to pinpoint issues faster, understand design behavior more intuitively, and streamline your entire VHDL RTL debug workflow. This webinar is Part 1 of …
The Component-based TPA and Virtual Prototyping Master Class is a 3-day live training event that brings together the NVH community at the NVH facility in Leuven, Belgium. This immersive program features theoretical …