Architecting an SoC is a complicated step in building a successful chip. The first step is ensuring you have the critical requirements for your SoC captured so that the possible architectural options may be explored and the IP components that enable those architectures can be identified. Selecting the right IP can make or break your …
Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Join us to explore the functionality and configurability of the AMD Zynq UltraScale+ RFSoC. With …
Continue reading "Webinar: Maximizing RFSoC Potential with Functionality and Configurability"
*Work Email Required* Edge AI systems increasingly require on-chip integration of large-capacity memory, compute engines, and inference-optimized accelerators—all within strict power, latency, and footprint constraints. This webinar provides a an …
Continue reading "Webinar: IP Design Considerations for Real-Time Edge AI Systems"
