Optimize 22nm SoC Power & Performance with DesignWare Foundation IP & Fusion Compiler

This course will be held Online

For their next-generation SoCs, system architects are moving from 28nm to 22nm to improve power and performance. Derived as an optical shrink from the 28nm HPC+ platform, the 22ULP technology offers the power/performance trade-off typically sought after by  consumer, and automotive applications, while the 22ULL technology provides significant power reduction crucial for designs in the …

Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing

Cloud computing is going through a significant overhaul and continues to grow globally with increasing presence of hyperscale cloud providers for big data, high-performance computing (HPC), and analytics. In-house data centers are increasingly going off-premise, resulting in the co-location of data centers that manage and store data for companies and application developers to improve scalability …