Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library

Online

As hyperscaler chiplet and SoCs grow in complexity, integrating and validating multiple high-speed and low-speed interface protocols—such as PCIe, CXL, UCIe, AMBA, AXI, AHB, CHI, CSI2, and DSI2, can be a significant challenge. Design Verification Engineers and Technical Managers must ensure seamless protocol compliance while staying focused on their core ASIC design value. Join us …

Webinar: Verifying Chiplet-based Systems

Online

Verifying Chiplet-based Systems (online) As the semiconductor industry increasingly embraces chiplet-based architectures, the complexity of system integration and verification has grown exponentially. Verifying these modular systems demands new approaches, tools, and collaboration across design and verification teams. This online edition of DVClub will focus on the challenges, strategies, and breakthroughs in verifying chiplet-based systems. Industry …