Tackling Advanced Analog FinFET Front-End Design Challenges with Better Methodologies
OnlineOverview Analog engineers adopting advanced FinFET technologies face many challenges that were not present when using planar transistors. Challenges in layout implementation have a direct impact on design specifications, and the luxury of over-margining is long gone. There are no third-order effects anymore, and managing layout effects, such as device and interconnect parasitics, variation, matching, and …