it-sa Expo & Congress

Nuremberg, Germany Nuremburg, Germany

it-sa Expo&Congress in Nuremberg is Europe's largest trade fair for IT security... ...and one of the most important dialogue platforms for IT security solutions. The trade fair covers the entire …

SEMICON West 2025

Phoenix Convention Center 100 N 3rd St, Phoenix, AZ, United States

SEMICON West 2025 makes its debut in Phoenix, October 7–9—positioning the city as a key hub for innovation and industry growth. This milestone event gathers global leaders across the microelectronics …

AutoSens Europe 2025

Palau de Congressos Palau de Congressos, Av. de la Reina Maria Cristina, s/n, Sants-Montjuïc, Barcelona, Spain

We're back in the vibrant city of Barcelona, bringing together experts from across the industry From 7th-9th October 2025, we’re reuniting the AutoSens community at the Palau de Congressos in …

2025 OCP Global Summit

San Jose Convention Center 150 W San Carlos St, San Jose, CA, United States

The OCP Summit is the premier event uniting the most forward-thinking minds in open IT Ecosystem development. The Summit presents a unique platform for our Community from around the globe to …

MICRO 2025 – 58th IEEE/ACM International Symposium on Microarchitecture

Seoul, Korea Seoul, Korea, Republic of

The IEEE/ACM International Symposium on Microarchitecture® is the premier forum for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in …

RISC-V Summit North America 2025

Santa Clara Convention Center Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States

RISC-V is defining the future of open computing by providing unprecedented freedom to innovate. More than 13 billion RISC-V cores have shipped, powering new innovations in AI/ML, wireless, automotive, data …

Achieving Timing Closure in FPGA Designs Workshop

Online

Achieving Timing Closure in FPGA Designs Workshop Do you find it challenging to close timing in your FPGA design? This workshop will guide you through leveraging AMD Vivado’s tools, optimizing your design, and applying best practices for static timing analysis to achieve reliable timing closure. Gain hands-on experience with timing closure techniques and learn strategies to improve …