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it-sa Expo&Congress in Nuremberg is Europe's largest trade fair for IT security... ...and one of the most important dialogue platforms for IT security solutions. The trade fair covers the entire …
Phoenix Convention Center
100 N 3rd St, Phoenix, AZ, United States
SEMICON West 2025 makes its debut in Phoenix, October 7–9—positioning the city as a key hub for innovation and industry growth. This milestone event gathers global leaders across the microelectronics …
Palau de Congressos
Palau de Congressos, Av. de la Reina Maria Cristina, s/n, Sants-Montjuïc, Barcelona, Spain
We're back in the vibrant city of Barcelona, bringing together experts from across the industry From 7th-9th October 2025, we’re reuniting the AutoSens community at the Palau de Congressos in …
Hilton Phoenix Chandler
Hilton Phoenix Chandler, 2929 W Frye Road, Chandler, AZ, United States
Join us for our inaugural Connected Equipment Summit! Register here: Connected Equipment Summit October 9, 2025 | 9AM PT This summit will take place at the Hilton Phoenix Chandler and will bring together industry leaders from across the semiconductor ecosystem—including fabs, equipment OEMs, and fabless companies. This premier event will showcase PDF Solutions’ latest innovations in …
San Jose Convention Center
150 W San Carlos St, San Jose, CA, United States
The OCP Summit is the premier event uniting the most forward-thinking minds in open IT Ecosystem development. The Summit presents a unique platform for our Community from around the globe to …
ABOUT PAINE Physical inspection of electronics has grown significantly over the past decade and is becoming a major focus for the chip designers, original equipment manufacturers, and system developers. The complex long life of the electronic devices coupled with their diverse applications is making them increasingly vulnerable to various forms of threats and inspection. Large …
October 15, 2025 - 11:00 AM EST October 16, 2025 – 10:00 AM JST/KST Discover the 5 Critical AI Market Trends Reshaping Semiconductors in 2026 From datacenter accelerators to 2nm …
Date: Oct 15, 2025 | 5:00 PM PST Featured Speakers: Saurabh Suryavanshi, Product Manager, Synopsys Youngkwon Cho, Senior Staff Engineer, Synopsys Dipanjan Basu, Principal Engineer, Synopsys Calibration is an essential part of enabling TCAD …
Shanghai World Expo Exhibition and Convention Center China
1099 Guozhan Rd, Shanghai, Pudong
Conference Profile The embedded world China Conference will take place on October 16 and 17, 2025 at the Shanghai World Expo Exhibition and Convention Centre. The main topics of this …
The IEEE/ACM International Symposium on Microarchitecture® is the premier forum for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in …
Joseph A. Floreano Rochester Riverside Convention Center
Joseph A. Floreano Rochester Riverside Convention Center, 123 East Main Street, Rochester, NY, United States
Join colleagues at the largest optical manufacturing conference and exhibition in North America SPIE Optifab is the premier event to meet with top companies and learn about the latest optical …
NIST Gaithersburg
NIST Gaithersburg, 100 Bureau Drive, Gaithersburg, MD, United States
The National Institute of Standards and Technology (NIST) will host the Semiconductor Traceability and Provenance Workshop on Tuesday, October 21, 2025, at its campus in Gaithersburg, Maryland. This in-person, one-day …
Santa Clara Convention Center
Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States
RISC-V is defining the future of open computing by providing unprecedented freedom to innovate. More than 13 billion RISC-V cores have shipped, powering new innovations in AI/ML, wireless, automotive, data …
Event Summary The year 2025 is both a turning point for integrated photonics as a key enabler for AI, physical and infrastructure interconnect, and the International Year of Quantum (IYQ). …
Webinar date: 22.10.2025 | 9 AM CEST | 5 PM CEST Join our webinar and learn about the fundamentals of Gallium Nitride (GaN) technology and its applications in power systems. …
Achieving Timing Closure in FPGA Designs Workshop Do you find it challenging to close timing in your FPGA design? This workshop will guide you through leveraging AMD Vivado’s tools, optimizing your design, and applying best practices for static timing analysis to achieve reliable timing closure. Gain hands-on experience with timing closure techniques and learn strategies to improve …
October 22, 2025 - 11:00 AM EST October 23, 2025 – 10:00 AM JST/KST Discover the 5 Critical Power Market Trends Reshaping Semiconductors in 2026 Wide-bandgap disruption, PMIC innovation, and datacenter power demand, what’s next for power semiconductors. The rise of AI datacenters is driving unprecedented demand for power, creating both massive opportunities and major …
Europe's Role & Chips Act 2.0 Priorities The European Union is currently developing a new version of the Chips Act program. The European Chips Act 2.0 represents a strategic initiative to strengthen the European semiconductor ecosystem. Building on the original Chips Act adopted in 2023, this updated framework aims to address emerging technologies such as …
*Work Email Required* Edge AI systems increasingly require on-chip integration of large-capacity memory, compute engines, and inference-optimized accelerators—all within strict power, latency, and footprint constraints. This webinar provides a an overview of IP architecture and integration methodologies that support real-time AI workloads at the edge. We’ll cover: • Memory and compute efficiency: Techniques for optimizing …
Grand Hyatt Tokyo
6 Chome-10-3 Roppongi, Minato City, Tokyo, Japan
Join us for the 2025 TSMC OIP ECOSYSTEM FORUM Get ready for an electrifying dive into the future of semiconductor design at the 2025 TSMC Global Open Innovation Platform® (OIP) Ecosystem Forum! This isn't just an event; it's a dynamic hub where the brightest minds converge to ignite the next wave of innovation. As the AI …
The 2025 International Conference on Computer-Aided Design Call For Papers Jointly sponsored by IEEE and ACM, IEEE ICCAD is the premier forum to explore new challenges, present leading-edge innovative solutions, …
The increasing demand for accelerated computing solutions calls for an agile hardware design methodology to be able to keep up with fast evolving landscape of algorithms. Traditional hardware design methodology has long development cycles involving defining architecture, doing microarchitecture development using RTL, and performing verification. An agile workflow requires being able to iterate through the …
San Jose Convention Center
150 W San Carlos St, San Jose, CA, United States
CadenceCONNECT: Jasper User Group 2025 is October 29 and 30 in San Jose, CA. This interactive, in-depth technical conference connects designers, verification engineers, and engineering managers from around the world …
As digital chip design complexity grows, engineering teams face increasing pressure to meet aggressive PPA targets on tight schedules. To overcome this challenge, the EDA industry requires a revolutionary shift towards AI. Siemens EDA is leading this transformation by implementing a comprehensive strategy that combines machine learning, reinforcement learning, generative, and agentic AI across the …
Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Unlock the potential of the AMD Kria SOM and discover Time-Sensitive Networking (TSN) benefits for your applications. In this session, you’ll explore the TSN-ROS application and its role in enhancing communications within a TSN framework. Join our hands-on demonstration to …
October 29, 2025 - 11:00 AM EST October 30, 2025 – 10:00 AM JST/KST Discover the 5 Critical Memory Market Trends Reshaping Semiconductors in 2026 AI workloads, HBM4 adoption, and 3D NAND scaling—what’s next for the memory industry in 2026. The memory semiconductor industry is entering a critical inflection point. Explosive AI workloads are pushing …
Semiconductor and integrated circuit developments continue to proceed at an incredible pace. The industry as a whole has gotten to this point of incredible complexity through the process of countless …
Strengthen your knowledge and skills by learning about new packaging technologies in Fan-in, Fan-out WLP, Embedded packaging technology, System on Chip (SOC), System in Package (SiP), 3D IC, WLP, TSV, etc. Packaging knowledge is a must for professionals in the semiconductor industry. The first part of this course dives deep into advanced packaging. Part 2 …
Scaling Together in a Dynamic World The photonic chip industry is reaching new heights - but scaling production, applications, and investments requires a united effort. As demand surges for high-speed, …
Connect to the embedded community With its 20 years of history and experience in Europe, embedded world is the most professional and largest exhibition in its field, and has accumulated …
November 4, 2025 | 10:00 AM PST This webinar will present advanced simulation tools and techniques for the design of GaN power amplifiers with increased assurance of stable operation that goes beyond simple k-factor analysis. The methods will be demonstrated using Qorvo GaN technology and related non-linear models that have been modified to facilitate advanced …
New York University Tandon School of Engineering
New York University Tandon School of Engineering, 6 MetroTech Center, Brooklyn, NY, United States
What is the Brooklyn 6G Summit The Brooklyn 6G Summit (B6GS) is a premier event for the global communications industry, bringing together leading voices from technology, business, academia and regulation …
Details Imaging radar has rapidly evolved into a critical technology for autonomous systems, with patent activity accelerating significantly over the past decade. From 2015 to 2024, global imaging radar patent publications increased more than tenfold, fueled by the rise of autonomous driving, 4D radar integration, AI-based perception, and sensor fusion. This surge has created an …
High-Level Synthesis (HLS) is design flow in which design intent is described at a higher level of abstraction such as SystemC/C++/Matlab/etc. HLS tools are expected to synthesize this code to RTL which can be input to the traditional RTL downstream flow (RTL/GDS). Formal check tools are difficult to be analyzed on generated RTL (as the …
Keysight Technologies
5301 Stevens Creek Blvd., Santa Clara, CA, United States
Power testing is more complex than ever. From subtle low-power signals to multi-kilowatt loads, bulky setups and limited software often slow you down and take up valuable lab space. At Open …
About this event Join Roger Nichols, 6G Program Manager, for an insightful discussion on the 6G spectrum. He will cover the current status of 6G technologies, standards, and policies for …
Join us for this engaging Master Class with Benyamin Davaji, PhD, Assistant Professor of Electrical and Computer Engineering at Northeastern University and Peter Doerschuk, Professor of Electrical and Computer Engineering …
November 5, 2025 - 11:00 AM EST November 6, 2025 – 10:00 AM JST/KST Discover the 5 Critical Sensor Market Trends Reshaping Semiconductors in 2026 From 8K smartphones to AI …
Join our webinar to learn how Ansys optiSLang and Thermal Desktop tackle thermal and fluid challenges, optimize design, and enhance product performance with a vapor chamber use case. Date & …
Join our webinar to explore how Ansys LS-DYNA enhances manufacturing simulations in sheet metal forming, welding, forging, and more, improving accuracy and workflow efficiency. Date/Time: November 5, 2025 11 AM IST …
Computer History Museum
Computer History Museum, 1401 N Shoreline Blvd, Mountain View, CA, United States
On-the-Road to a $1 Trillion Industry Reaching $1 trillion in annual semiconductor sales by 2030 presents both significant challenges and offers compelling opportunities. About this event Reaching $1 trillion in …
Fraunhofer Institute for Reliability and Microintegration IZM
Gustav-Meyer-Allee 25, Building 17/3, Berlin, Germany
On 6 and 7 November, Fraunhofer IZM is inviting customers and partners from industry to Berlin for its “Electronic Packaging Days”. The event is designed to facilitate direct exchange between …
Ferry Building
Ferry Building, 1 Ferry Building, San Francisco, CA, United States
Archetype, a global tech communications consultancy, is co-hosting, with GV (fka Google Ventures) an exec, media and comms networking event in San Francisco on Thursday, November 6, from 5:30 to …
Hayes Mansion
Hayes Mansion, 200 Edenvale Ave, San Jose, CA, United States
The Phil Kaufman Award honors individuals who have had a demonstrable impact on the field of electronic system design through technology innovations, education/mentoring, or business or industry leadership. The award was …
As the global semiconductor landscape continues to evolve, Vietnam is positioning itself for a promising future in the semiconductor industry. SEMIEXPO Vietnam will be a pivotal event, exploring opportunities for …