To run the real-world workloads on cycle-accurate hardware simulation framework is one of the essential tasks in the system-level validation before silicon tape-out. S2C introduced Prodigy Cloud System recently in the response to meet challenging targets. It is equipped with scalable FPGA capacity using the largest FPGA devices for multi-billion gate SoC design and verification. …
Identifying glitches and revealing the extra power they consume require special attention to cell delays and wire delays. To enable earlier and more frequent analysis, physical-and-timing-aware glitch power analysis is needed throughout the flow from RTL to Signoff. In this webinar, we review the glitch power challenges facing SoC designers and the key technologies that …
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Overview: As geometries of integrated circuits get smaller and complex, electrostatic discharge (ESD) and Parasitic related design issues become prevalent. In this webinar we will show you a few methodologies to help reduce the design cycle by identifying ESD protection schemes in your netlist and assist in the verification of the point-to-point parasitic resistance between …
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Semiconductor companies designing ICs for smart phones, automotive and industrial applications, CPUs, GPUs and memory components all employ teams of custom IC designers to create the highest performance chips that are as small as possible, and at the lowest costs. Designers must verify and characterize their IP’s sensitivity to random parametric variations in the manufacturing …
If you are designing high-performance computing and networking SoCs for hyperscale data centers, then you require IP that enables large amounts of data to travel at very fast rates. Whether the IP is for true long reach or very short-reach die-to-die connectivity in multi-chip modules (MCMs), you must consider several essential features such as throughput, …
Continue reading "WEBINAR: High-Speed SerDes PHY IP for Up to 800G Hyperscale Data Centers"
In the emerging era of large scale SoCs comprised from complex IP, typically designed for AI and automotive applications, designers must embrace an innovative approach to overcome numerous safety and reliability challenges. Therefore, the solution must be scalable, robust and Functional Safety (FuSa) aware, in addition to meeting fast-time to market aspect. This webinar presents …
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RISC-V is an open standard instruction set architecture introduced in 2010
Accurately estimating power for your vision SoC can make the difference between success and a multi-million dollar failure. Estimating power can be fairly straightforward for a RISC processor, but today’s vision SoC designs include neural networks with intense computation requirements making accurate power estimation much complicated. How can a designer have confidence in the power …
Continue reading "Pitfalls of IP Power Estimation for AI & Vision SoCs, and How to Avoid Them"
If you are designing high-performance computing and networking SoCs for hyperscale data centers, then you require IP that enables large amounts of data to travel at very fast rates. Whether the IP is for true long reach or very short-reach die-to-die connectivity in multi-chip modules (MCMs), you must consider several essential features such as throughput, …
Continue reading "High-Speed SerDes PHY IP for Up to 800G Hyperscale Data Centers"
Please join Xilinx and TigerGraph to learn about the next-generation machine learning solution combining cutting edge hardware with graph analytics on connected data to answer these key questions: How do I understand the wellness journey of a patient and find patients like them in real-time to figure out the recommended next steps? Can I understand a customer’s …
The all-new Ansys Discovery provides engineers with a user-friendly, fast and powerful 3D simulation tool that helps enable the conceptualization, evaluation and refinement of next generation products. Attend this webinar to learn: How Discovery will increase the speed and accuracy of your design Diverse physics Key features of Discovery’s new user interface How to achieve …
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2020 CASPA Tech Education Day HiFive from SiFive: Project Show Case Venue: Zoom Video Webinar Date: Saturday, Aug.15, 2020 Time: 4:00pm – 6:00pm PDT Registration Link: https://www.eventbrite.com/e/2020-caspa-and-sifive-special-education-day-event-tickets-113575328866 Special announcement: 1. Please join our Telegram group: https://t.me/CASPAEDU 2. There are 10 Hifive boards as gifts to give away, and you must register to win. Gifts will be shipped to US …
