Webinar: Functional ECO Solution for Mixed-Signal ASIC Design

Functional ECO (Engineering Change Order) continues to pose a persistent challenge for ASIC designers. To address this, Easy-Logic Technology, in collaboration with SemiWiki, is launching a webinar series focused on tackling ECO challenges across various ASIC design segments—starting with Mixed-Signal ASICs.

Why Mixed-Signal ASICs?

Mixed-signal ASICs are found in everyday applications such as power management, image sensors, medical and industrial devices, and display drivers. While analog circuitry dominates mixed-signal designs, the digital portion presents its own set of unique and complex ECO challenges. These include integration with analog blocks, mixed-level design involving both RTL and hand-crafted gate netlists, and frequent, unpredictable ECO requests, among others. Such mixed-signal applications demand tailored ECO solutions—not a traditional one-size-fits-all approach.

Easy-Logic’s Proven Expertise

With over 10 years of experience solving functional ECO challenges, Easy-Logic offers a comprehensive solution that encompasses the diverse needs of mixed-signal ASIC design. Its technology has been widely deployed across a broad range of customer projects and design segments.

This webinar will feature:

• A deep dive into the digital ECO challenges in mixed-signal ASICs

• Practical solutions and methodologies presented by Easy-Logic experts

Speaker:

Richard Chang With over 30 years of experience in the VLSI industry, Mr. Chang has held a variety of design and management positions. He has comprehensive expertise across the entire ASIC/SoC design cycle—from specification, design, simulation, and FPGA prototyping to tape-out and silicon bring-up.

REGISTER HERE