Terascale AI, 1.6T and Beyond Seminar: Santa Clara
About this event
Next-generation AI systems are pushing electrical, optical, and packaging technologies to their limits. Join Keysight experts as they share insights on validating 224G / 448G SerDes, preparing for emerging IEEE 1.6T optical standards, advancing silicon photonics, and strengthening die-to-die interconnects for chiplet-based architectures.
This is your chance to learn directly from the engineers shaping the future of high-speed I / O design — all in one room. Sign up today.
Who should attend this event?
This seminar is ideal for engineers working on next-generation connectivity and AI infrastructure, including optical design, silicon photonics, high-speed digital, validation, test & measurement, signal integrity, compliance, and chiplet / die-to-die interconnect architectures.
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