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Synopsys GUC COUPE Webinar Banners 800x100
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Why AI Security Starts at the Chip Level

Why AI Security Starts at the Chip Level
by Daniel Nenni on 10-15-2026 at 6:00 am

Luminous Shield Over an AI Chip

Artificial intelligence is becoming part of the infrastructure that powers healthcare, transportation, finance, manufacturing, and everyday digital services. As these systems grow more capable, they also process more sensitive information and depend on increasingly complex hardware. The Synopsys white paper, “Securing… Read More


Overcoming the Edge AI Power Wall with Low-Voltage Foundation IP

Overcoming the Edge AI Power Wall with Low-Voltage Foundation IP
by Kalar Rajendiran on 10-12-2026 at 8:00 am

Voltage Regions and Impact of Voltage Scaling

As artificial intelligence (AI) workloads migrate to endpoint hardware, edge AI devices face immense pressure to deliver real-time inference within highly restrictive power and thermal envelopes. Traditional silicon scaling no longer yields the power-density returns it once did. To compensate, engineering teams are turning… Read More


From Simulation to Deployment: Why Physical AI Matters

From Simulation to Deployment: Why Physical AI Matters
by Daniel Nenni on 10-05-2026 at 8:00 am

AI is Leaving the Screen Synopsys Nvidia SemiWiki

Artificial intelligence is moving beyond the screen. The attached presentation describes a shift from systems that generate text, images, and code to systems that can perceive their surroundings and take action. These systems could guide robots, vehicles, factory equipment, medical devices, and critical infrastructure.… Read More


OpenAI and Synopsys Announce GPT-Synopsys: Why AI-Powered Chip Design Matters

OpenAI and Synopsys Announce GPT-Synopsys: Why AI-Powered Chip Design Matters
by Daniel Nenni on 10-01-2026 at 8:00 am

Synopsys OpenAI

Wow, OpenAI and Synopsys just announced a multiyear partnership to develop GPT-Synopsys, a specialized artificial intelligence model for semiconductor design. The agreement combines OpenAI’s frontier models with Synopsys’ electronic design automation software and engineering expertise. Its ambition is to help engineers… Read More


Why Advanced Chip Packaging Is Becoming a Design Problem

Why Advanced Chip Packaging Is Becoming a Design Problem
by Daniel Nenni on 09-29-2026 at 2:00 pm

Why Advanced Chip Packaging Is Becoming a Design Problem

As chipmakers put more computing power into a single system, the challenge extends beyond making individual chips faster. They must connect multiple chips, memory stacks, power supplies, and sometimes optical components in a compact package. In the2026 TSMC OIP Forum talk “Addressing Inter-Die Complexity for 3D Multi-Die… Read More


Synopsys Announces AgentEngineer Solutions and Autopilot Platform for Autonomous Engineering

Synopsys Announces AgentEngineer Solutions and Autopilot Platform for Autonomous Engineering
by Kalar Rajendiran on 09-28-2026 at 6:00 am

updated from ai assisants to autonomous engineering

Synopsys today announced its AgentEngineerTM solutions portfolio and AutopilotTM Platform, advancing a fundamental paradigm shift in electronic design automation (EDA): moving beyond AI copilots toward autonomous engineering agents. Following a recent technical briefing with Thomas Andersen, Vice President of AI and… Read More


AI Memory Gap at DAC 2026

AI Memory Gap at DAC 2026
by Daniel Payne on 09-07-2026 at 10:00 am

AI memory gap

On Tuesday at #DAC2026 I attended the exhibitor presentation, Synopsys: How Silicon Startups are Addressing the AI Memory Gap. Vikram Bhatia from Synopsys introduced the two presentations from Wenbo Yin, SVP of IC Design at TetraMem and R. Scott Hills, VP of Business Development at ANAFLASH. Datacenters consume large amounts… Read More


Podcast EP364: The Broad Impact of Advanced Mask Solutions, Today and Tomorrow with Dr. Germain Fenger

Podcast EP364: The Broad Impact of Advanced Mask Solutions, Today and Tomorrow with Dr. Germain Fenger
by Daniel Nenni on 09-04-2026 at 10:00 am

Daniel is joined by Dr. Germain Fenger, Senior Director of Product Management at Synopsys where he leads advanced mask solutions and computational lithography technologies. With a background spanning semiconductor manufacturing, lithography research, engineering, and product leadership, Germain has held roles at imec,… Read More


The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response

The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response
by Kalar Rajendiran on 09-04-2026 at 6:00 am

2025 Design IP Sub Categories Market Share Pie Chart

While semiconductor design intellectual property (IP) is a $9.45 billion market, it acts as the absolute architectural bottleneck for the entire global semiconductor value chain. The choices made at the IP layer today dictate the cost, power, and security of a downstream technology economy rapidly marching toward a trillion… Read More


Unified Emulation and Prototyping: Pipedream or Reality?

Unified Emulation and Prototyping: Pipedream or Reality?
by Lauro Rizzatti on 09-03-2026 at 10:00 am

Unified Emulation and Prototyping Pipedream or Reality Figure 1

Preamble
Hardware-assisted verification (HAV) platforms, including hardware emulators and FPGA-based prototyping systems, are the two dominant methodologies for validating long workloads on complex System-on-Chip (SoC) designs before tape-out. HAV sits within a broader continuum of verification engines: simulation… Read More