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Designing a system-on-chip (SoC) has never been more complex—or more critical. With accelerating demands across AI, automotive, and high-performance compute applications, today’s SoC architects face a series of high-stakes tradeoffs from the very beginning. Decisions made during the earliest phases of design—regarding… Read More
According to a recent whitepaper by Samtec, Channel Operating Margin (COM) didn’t start as an algorithm; it started as a truce. In the late 2000s and early 2010s, interconnect designers and SerDes architects were speaking past each other. The former optimized insertion loss, return loss, and crosstalk against frequency-domain… Read More
– Musk chip lifeline to Samsung comes with interesting strings attached
– Musk chose Samsung over Intel-What does that say about Intel?
– Musk will hold sway over Samsung much as Apple/NVDA over TSMC
– Will Musk do a “DOGE” on chip tool makers? How much influence?
Alchip Technologies, a global leader in high-performance computing (HPC) and AI infrastructure ASICs, has officially launched its 2nm Design Platform, marking a major advancement in custom silicon design. The company has already received its first 2nm wafers and is collaborating with customers on the development of high-performance… Read More
Our Semiconductor Intelligence June Newsletter showed how U.S. imports of smartphones have been on a downward trend since January 2025, led by China. Other key electronic products have also experienced sharp drops in U.S. imports from China.F
U.S. smartphone imports in May 2025 were $3.03 billion, up slightly from April but … Read More
AI explosion is clearly driving semi-industry since 2020. AI processing, based on GPU, need to be as powerful as possible, but a system will reach optimum only if it can rely on top interconnects. The various sub-system need to be interconnected with ever more bandwidth and lower latency, creating the need for ever advanced protocol… Read More
In AI it is easy to be distracted by hype and miss the real advances in technology and adoption that are making a difference today. Accellera hosted a panel at DAC on just this topic, moderated by Daniel Nenni (Mr. SemiWiki). Panelists were: Chuck Alpert, Cadence’s AI Fellow driving cross-functional Agentic AI solutions throughout… Read More
It was my pleasure to meet with Vamshi Kothur and the Tuple team at #62DAC for a briefing on their Tropos platform and Omni, a new multi-cloud optimizer. The conferences this year have been AI infused with exciting new technologies but one of the lingering questions is: How will the existing semiconductor design IT infrastructure… Read More
If you’ve spent a lot of time in the chip or EDA business, “design” typically means chip design. These days it means heterogeneous multi-chip design. If you’ve spent time developing end products, “design” has a much broader meaning. Chips, subsystems, chassis and product packaging are in focus. This is just a short list if you consider… Read More
It’s now difficult to remember when we didn’t reuse our own IP and didn’t have access to extensive catalogs of commercial IP. But reuse comes with a downside – without modification we can’t finetune IP specs to exactly what we want in a current design. We’re contractually limited in how we can adapt commercial IP, however vendors … Read More
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