Lead Product Engineer – High Speed PHY IP

This is a unique opportunity to join the rapidly growing Product Engineering team in the IP R&D Group at Cadence Design Systems. We are looking for a Principle Product Engineer who will be the main technical interface on Key Customer engagements deploying our advanced high speed PHY IP.  This is a hands-on technical position.  The candidate must have experience successfully integrating and/or designing high speed PHY IP in an SOC and product level environment.

Responsibilities:

• Main technical interface between R&D team and tier one customer design teams using advanced high speed PHY IP.
• Primary technical contact for customer SOC and system integration questions.
• Support customer SOC teams from RTL and PHY integration to final GDS, and production ramp.
• Working with Analog design and DV team to integrate DFT implementations, support customers with ATE deployment and silicon bringup. Debug issues on Wafer and Production tests.
• Primary technical link between R&D team and Field Application Engineers
• Generate technical specification, data sheets, and application notes.
• Update R&D teams with the latest customer feedback and competitive analysis.
• Drive and support Customer silicon evaluations and demos.

Position Requirements:

• M.S. Electrical/Computer Engineering (or similar degree)
• 3+ years experience developing or using high speed PHYs (16Gbps+)
• Experience working with USB, SATA, PCIe, or Ethernet protocols.
• Experience using advanced mixed signal verification, and system simulation tools.
• Experience in SOC design implementation, from RTL to final GDS, and production ramp.
• Verilog design and static timing close experience.
• Experience with industry standard DFT flows and methodologies.
• Strong Exposure to all major IC implementation, design, verification, and debug tools.
• Strong debug and problem solving skills
• Hands on experience with high speed scopes and signal analysis equipment  is a plus
• Familiarity with advanced technology nodes (16nm and below) is a plus
• Must have strong group presentation skills.