Circuit Simulation Challenges to Design the Xilinx Versal ACAP

Circuit Simulation Challenges to Design the Xilinx Versal ACAP
by Daniel Payne on 06-24-2021 at 10:00 am

xilinx versal acap min

One of the most unique acronyms that I learned about this past year is ACAP from Xilinx, which stands for Adaptive Compute Acceleration Platform. At the recent Cadence LIVE event, I had the pleasure of watching Pei Yao, a Xilinx senior staff CAD engineer, as she talked about the challenges of getting all the analog and mixed-signals… Read More


Getting Started with Xilinx Versal ACAP Platform

Getting Started with Xilinx Versal ACAP Platform
by Daniel Nenni on 02-25-2021 at 9:00 am

Join us:

BLT is co-organizing this free, live online training event with Xilinx Customer Training and other Xilinx Authorized Training Providers. The two day event includes live instruction, optional labs, and a drawing for a grand prize.

Course: Designing with the Versal ACAP: Architecture & Methodology

In this virtual,… Read More