Enabling Next Generation Silicon In Package Products

Enabling Next Generation Silicon In Package Products
by Kalar Rajendiran on 04-15-2021 at 10:00 am

System on Package Motivation AlphaWave IP

In early April, Gabriele Saucier kicked off Design & Reuse’s IPSoC Silicon Valley 2021 Conference. IPSoC conference as the name suggests is dedicated to semiconductor intellectual property (IP) and IP-based electronic systems. There were a number of excellent presentations at the conference. The presentations had been… Read More


Features of Short-Reach Interface IP Design

Features of Short-Reach Interface IP Design
by Tom Dillinger on 03-08-2021 at 6:00 am

eye diagram

The emergence of advanced packaging technologies has led to the introduction of new types of data communication interfaces.  There are a number of topologies that are defined by the IEEE 802.3 standard, as well as the Optical Internetworking Common Electrical I/O CEI standard. [1,2]  (Many of the configurations of interest … Read More


Optimizing Chiplet-to-Chiplet Communications

Optimizing Chiplet-to-Chiplet Communications
by Tom Dillinger on 06-29-2020 at 6:00 am

bump dimensions

Summary
The growing significance of ultra-short reach (USR) interfaces on 2.5D packaging technology has led to a variety of electrical definitions and circuit implementations.  TSMC recently presented the approach adopted by their IP development team, for a parallel-bus, clock-forwarded USR interface to optimize power/performance/area… Read More