Variation-Aware Custom IC Design Best Practices

Variation-Aware Custom IC Design Best Practices
by Daniel Nenni on 05-21-2014 at 1:00 pm

I’ve worked with Solido for 5 years, and it’s been a pleasure to watch the world’s top semiconductor companies and foundries adopt Solido software for their SPICE simulation flows.

Sub-28nm design starts are accelerating, growing from 150 in 2012 to 900 this year. The move to sub-28nm design nodes is being driven by consumer electronic… Read More


Winning in Monte Carlo: Managing Simulations Under Variability and Reliability

Winning in Monte Carlo: Managing Simulations Under Variability and Reliability
by Daniel Nenni on 05-11-2013 at 7:00 pm

I recently talked to Trent McConaghy about his book on variation-aware design of custom ICs and the #50DAC tutorial we are doing:

Winning in Monte Carlo: Managing Simulations Under Variability and Reliability.

Trent is the Solido Chief Technology Officer, an engaging speaker, one of the brightest minds in EDA, and someone who… Read More


PVT and Statistical Design in Nanometer Process Geometries

PVT and Statistical Design in Nanometer Process Geometries
by Daniel Nenni on 09-18-2011 at 9:00 am

On Sept 22, 2011, the nm Circuit Verification Forumwill be held in Silicon Valley, hosted by Berkeley Design Automation. At this forum, Trent McConaghy of Solido DA will present a case study on the TSMC Reference Flow 2.0 VCO circuit, to showcase Fast PVT in the steps of extracting PVT corners, verifying PVT, and doing post-layout… Read More