How to Overcome the Advanced Node Physical Verification Bottleneck

How to Overcome the Advanced Node Physical Verification Bottleneck
by Mike Gianfagna on 04-22-2026 at 6:00 am

How to Overcome the Advanced Node Physical Verification Bottleneck

It is well-known that advanced semiconductor process technology presents substantial challenges across the full design flow and global supply chain. In this piece, we will focus on a particularly difficult problem – physical verification. This design step is the final gate to manufacturing. Producing a final tape‑out GDS … Read More


Synopsys and TSMC Unite to Power the Future of AI and Multi-Die Innovation

Synopsys and TSMC Unite to Power the Future of AI and Multi-Die Innovation
by Daniel Nenni on 10-01-2025 at 10:00 am

UNDER EMBARGO 1PM PT Sept 24 Synopsys TSMC OIP 2025 (1)

In a rapidly evolving semiconductor landscape, where AI demands unprecedented computational power and efficiency, Synopsys has deepened its partnership with TSMC to pioneer advancements in AI-driven designs and multi-die systems. Announced during the TSMC OIP Ecosystem Summit last week, this collaboration leverages … Read More