I first learned about ATPG – Automatic Test Program Generation in the 1980s at Silicon Compilers, then continued in the 90s at Viewlogic with the Sunrise tools, so it was illuminating to get an update from Synopsys on their ATPG technology by attending a webinar. Synopsys over the years has developed a family of test tools, shown … Read More
The annual Siemens Digital Industries Software user group event was held virtually on May 26th, which made it easy to attend from my home office, although selecting from the list of speakers was a challenge, because they offered 475 sessions, wow. My focus is EDA, so I listened to Joseph Sawicki, the Executive Vice President, IC … Read More
During synthesis and static timing the main figure of merit is “slack”. If a signal arrives with time to spare before it is needed (often measured against the setup time before a clock changes at a register) then the slack is positive. Positive slack is generally a good thing, although it can indicate over-design if … Read More
