The Component-based TPA and Virtual Prototyping Master Class is a 3-day live training event that brings together the NVH community at the NVH facility in Leuven, Belgium. This immersive program features theoretical lectures and insights from industry leaders, supported by live demonstrations, interactive sessions, and
Discover how Siemens’ open, modular framework enables scalable, standardized automation for battery cell production
Join us for an in-depth webinar exploring the transformative potential of Siemens’ Battery Automation Framework — a cutting-edge, open, and modular toolkit designed specifically for the automation
Energy efficiency is essential for edge devices, especially those powered by batteries or harvested energy, making low-power AI and machine learning inference a real challenge. In this hackathon focused on accelerating… Read More
June 24, 2025
12:00 PM -1:00 PM
Moscone West | San Francisco, CA
Calibre: Supercharge your chip integration efforts
Siemens is excited to host an exclusive event for our customers at the Design Automation Conference
Join us at DAC for lunch and learn how our new products can supercharge your chip integration efforts:
– Chip… Read More
Are you ready to disrupt decades of outdated processes and lead a smarter, more sustainable future in semiconductor manufacturing? While the digital twin has long been a cornerstone of chip design, its power has yet to be fully harnessed on the fab floor. Meanwhile, manufacturers experience increased pressure
Discover how proteanTecs is transforming health and performance monitoring across the semiconductor lifecycle to meet the growing demands of AI and Next-Gen SoCs.
Stop by DAC booth #1616 to experience our latest technologies in action, including interactive live demos and explore our full suite of solutions — designed to boost… Read More
This webinar introduces Questa One Sim CX, an innovative coverage-driven simulation solution that revolutionizes SystemVerilog UVM verification workflows.
Traditional coverage closure methods, relying on constrained-random stimulus generation and iterative manual adjustments, often prove time-consuming and resource-intensive.
Rising semiconductor complexity—driven by multi-die architectures, the move towards more advanced technology nodes, and more stringent reliability targets, is dramatically increasing the volume of verification required to achieve DFT verification sign-off.
Come learn how the Questa One DFT Verification solution, combined
Wednesday, June 4 – 8:00 AM Pacific
In today’s automotive electronics, ensuring functional safety is paramount for meeting stringent industry standards. This webinar introduces Questa One Sim FX, a cutting-edge fault simulation platform designed specifically for complex automotive designs. We’ll
Wednesday, May 28 – 8:00 AM Pacific
Managing traceability across multiple disconnected tools and data is a challenge that often leads to inefficiencies, missed coverage, and increased risk in safety-critical designs.
In this webinar, discover how Questa Verification IQ Testplan Author seamlessly integrates with
