Configurable xSPI memory controller IP core is FuSa-ready

Configurable xSPI memory controller IP core is FuSa-ready
by Don Dingee on 05-13-2026 at 10:00 am

xSPI-MC block diagram

SPI, invented some four decades ago, is so successful as a low-pin-count interface for microcontrollers and processor cores that it spurred memory makers to incorporate both the physical signaling interface and advanced memory command protocols into serial flash and serial pseudo-SRAM (PSRAM) devices. Those protocols, … Read More