At a workshop in Boston on February 27, something subtle but important happened. Developers sat down in front of a RISC-V laptop, installed Fedora, and ran a local large language model. No simulation. No dev board tethered to a monitor. A laptop.
For more than a decade, RISC-V advocates have promised that the open instruction set… Read More
As RISC-V adoption accelerates across the semiconductor industry, so do the concerns about hardware security vulnerabilities that arise from its open and highly customizable nature. From hardware to firmware and operating systems, every layer of a system-on-chip (SoC) design must be scrutinized for security risks. Unlike… Read More
The rapid proliferation of artificial intelligence (AI) across a growing number of hardware applications has driven an unprecedented demand for specialized compute acceleration not met by conventional von Neumann architectures. Among the competing alternatives, one showing the greatest promise is analog in-memory computing… Read More
